xen: arm: handle remaining traps from userspace

CP14 dbg and general CP register access are both handled with
unconditional injection of #undef from their respective handlers, so
allow these even from 32-bit userspace on a 64-bit kernel.

SMC32 and HVC32 should only come from a guest in AArch32 mode and
SMC64 and HVC64 should only come from a guest in AArch64 mode. Add
appropriate BUG_ONs to all cases.

After this bad_trap is no longer used.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Julien Grall <julien.grall@linaro.org>
This commit is contained in:
Ian Campbell committed 2015-03-31 09:42:53 +01:00
1 parent 6387001597
commit 90d42bff63
1 file changed
+6 -5
+6 -5
View File
@@ -2092,22 +2092,22 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs)
do_cp14_32(regs, hsr);
break;
case HSR_EC_CP14_DBG:
if ( !is_32bit_domain(current->domain) )
goto bad_trap;
BUG_ON(!psr_mode_is_32bit(regs->cpsr));
perfc_incr(trap_cp14_dbg);
do_cp14_dbg(regs, hsr);
break;
case HSR_EC_CP:
if ( !is_32bit_domain(current->domain) )
goto bad_trap;
BUG_ON(!psr_mode_is_32bit(regs->cpsr));
perfc_incr(trap_cp);
do_cp(regs, hsr);
break;
case HSR_EC_SMC32:
BUG_ON(!psr_mode_is_32bit(regs->cpsr));
perfc_incr(trap_smc32);
inject_undef32_exception(regs);
break;
case HSR_EC_HVC32:
BUG_ON(!psr_mode_is_32bit(regs->cpsr));
perfc_incr(trap_hvc32);
#ifndef NDEBUG
if ( (hsr.iss & 0xff00) == 0xff00 )
@@ -2119,6 +2119,7 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs)
break;
#ifdef CONFIG_ARM_64
case HSR_EC_HVC64:
BUG_ON(psr_mode_is_32bit(regs->cpsr));
perfc_incr(trap_hvc64);
#ifndef NDEBUG
if ( (hsr.iss & 0xff00) == 0xff00 )
@@ -2129,6 +2130,7 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs)
do_trap_hypercall(regs, &regs->x16, hsr.iss);
break;
case HSR_EC_SMC64:
BUG_ON(psr_mode_is_32bit(regs->cpsr));
perfc_incr(trap_smc64);
inject_undef64_exception(regs, hsr.len);
break;
@@ -2155,7 +2157,6 @@ asmlinkage void do_trap_hypervisor(struct cpu_user_regs *regs)
#endif
default:
bad_trap:
printk("Hypervisor Trap. HSR=0x%x EC=0x%x IL=%x Syndrome=0x%"PRIx32"\n",
hsr.bits, hsr.ec, hsr.len, hsr.iss);
do_unexpected_trap("Hypervisor", regs);
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