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x86/mm: don't wrap x86_emulate_ctxt in ptwr_emulate_ctxt
Rewrite the code so that it has the same structure as mmio_ro_emualte_ctxt. x86_emulate_ctxt now points to ptwr_emulate_ctxt via its data pointer. This patch will help unify mmio_ro and ptwr code paths later. Signed-off-by: Wei Liu <wei.liu2@citrix.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
This commit is contained in:
1 parent
25dcf06ff7
commit
977c63de3d
1 file changed
+19
-23
+19
-23
@@ -4964,7 +4964,6 @@ long arch_memory_op(unsigned long cmd, XEN_GUEST_HANDLE_PARAM(void) arg)
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*/
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struct ptwr_emulate_ctxt {
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struct x86_emulate_ctxt ctxt;
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unsigned long cr2;
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l1_pgentry_t pte;
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};
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@@ -4995,7 +4994,7 @@ static int ptwr_emulated_update(
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paddr_t val,
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unsigned int bytes,
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unsigned int do_cmpxchg,
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struct ptwr_emulate_ctxt *ptwr_ctxt)
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struct x86_emulate_ctxt *ctxt)
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{
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unsigned long mfn;
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unsigned long unaligned_addr = addr;
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@@ -5003,6 +5002,7 @@ static int ptwr_emulated_update(
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l1_pgentry_t pte, ol1e, nl1e, *pl1e;
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struct vcpu *v = current;
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struct domain *d = v->domain;
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struct ptwr_emulate_ctxt *ptwr_ctxt = ctxt->data;
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int ret;
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/* Only allow naturally-aligned stores within the original %cr2 page. */
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@@ -5026,7 +5026,7 @@ static int ptwr_emulated_update(
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{
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x86_emul_pagefault(0, /* Read fault. */
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addr + sizeof(paddr_t) - rc,
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&ptwr_ctxt->ctxt);
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ctxt);
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return X86EMUL_EXCEPTION;
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}
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/* Mask out bits provided by caller. */
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@@ -5141,9 +5141,7 @@ static int ptwr_emulated_write(
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memcpy(&val, p_data, bytes);
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return ptwr_emulated_update(
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offset, 0, val, bytes, 0,
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container_of(ctxt, struct ptwr_emulate_ctxt, ctxt));
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return ptwr_emulated_update(offset, 0, val, bytes, 0, ctxt);
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}
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static int ptwr_emulated_cmpxchg(
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@@ -5166,9 +5164,7 @@ static int ptwr_emulated_cmpxchg(
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memcpy(&old, p_old, bytes);
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memcpy(&new, p_new, bytes);
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return ptwr_emulated_update(
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offset, old, new, bytes, 1,
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container_of(ctxt, struct ptwr_emulate_ctxt, ctxt));
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return ptwr_emulated_update(offset, old, new, bytes, 1, ctxt);
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}
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static const struct x86_emulate_ops ptwr_emulate_ops = {
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@@ -5187,14 +5183,14 @@ int ptwr_do_page_fault(struct vcpu *v, unsigned long addr,
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struct domain *d = v->domain;
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struct page_info *page;
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l1_pgentry_t pte;
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struct ptwr_emulate_ctxt ptwr_ctxt = {
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.ctxt = {
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.regs = regs,
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.vendor = d->arch.cpuid->x86_vendor,
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.addr_size = is_pv_32bit_domain(d) ? 32 : BITS_PER_LONG,
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.sp_size = is_pv_32bit_domain(d) ? 32 : BITS_PER_LONG,
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.lma = !is_pv_32bit_domain(d),
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},
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struct ptwr_emulate_ctxt ptwr_ctxt;
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struct x86_emulate_ctxt ctxt = {
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.regs = regs,
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.vendor = d->arch.cpuid->x86_vendor,
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.addr_size = is_pv_32bit_domain(d) ? 32 : BITS_PER_LONG,
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.sp_size = is_pv_32bit_domain(d) ? 32 : BITS_PER_LONG,
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.lma = !is_pv_32bit_domain(d),
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.data = &ptwr_ctxt,
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};
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int rc;
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@@ -5224,7 +5220,7 @@ int ptwr_do_page_fault(struct vcpu *v, unsigned long addr,
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ptwr_ctxt.cr2 = addr;
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ptwr_ctxt.pte = pte;
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rc = x86_emulate(&ptwr_ctxt.ctxt, &ptwr_emulate_ops);
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rc = x86_emulate(&ctxt, &ptwr_emulate_ops);
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page_unlock(page);
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put_page(page);
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@@ -5239,18 +5235,18 @@ int ptwr_do_page_fault(struct vcpu *v, unsigned long addr,
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* emulation bug, or a guest playing with the instruction stream under
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* Xen's feet.
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*/
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if ( ptwr_ctxt.ctxt.event.type == X86_EVENTTYPE_HW_EXCEPTION &&
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ptwr_ctxt.ctxt.event.vector == TRAP_page_fault )
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pv_inject_event(&ptwr_ctxt.ctxt.event);
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if ( ctxt.event.type == X86_EVENTTYPE_HW_EXCEPTION &&
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ctxt.event.vector == TRAP_page_fault )
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pv_inject_event(&ctxt.event);
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else
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gdprintk(XENLOG_WARNING,
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"Unexpected event (type %u, vector %#x) from emulation\n",
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ptwr_ctxt.ctxt.event.type, ptwr_ctxt.ctxt.event.vector);
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ctxt.event.type, ctxt.event.vector);
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/* Fallthrough */
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case X86EMUL_OKAY:
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if ( ptwr_ctxt.ctxt.retire.singlestep )
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if ( ctxt.retire.singlestep )
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pv_inject_hw_exception(TRAP_debug, X86_EVENT_NO_EC);
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/* Fallthrough */
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