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x86/spec-ctrl: Enumeration for MMIO Stale Data controls
The three *_NO bits indicate non-susceptibility to the SSDP, FBSDP and PSDP
data movement primitives.
FB_CLEAR indicates that the VERW instruction has re-gained it's Fill Buffer
flushing side effect. This is only enumerated on parts where VERW had
previously lost it's flushing side effect due to the MDS/TAA vulnerabilities
being fixed in hardware.
FB_CLEAR_CTRL is available on a subset of FB_CLEAR parts where the Fill Buffer
clearing side effect of VERW can be turned off for performance reasons.
This is part of XSA-404.
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
(cherry picked from commit 2ebe8fe9b7)
This commit is contained in:
Andrew Cooper committed
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@@ -323,7 +323,7 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
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* Hardware read-only information, stating immunity to certain issues, or
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* suggestions of which mitigation to use.
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*/
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printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s\n",
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printk(" Hardware hints:%s%s%s%s%s%s%s%s%s%s%s%s%s%s\n",
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(caps & ARCH_CAPS_RDCL_NO) ? " RDCL_NO" : "",
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(caps & ARCH_CAPS_IBRS_ALL) ? " IBRS_ALL" : "",
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(caps & ARCH_CAPS_RSBA) ? " RSBA" : "",
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@@ -332,13 +332,16 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
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(caps & ARCH_CAPS_SSB_NO) ? " SSB_NO" : "",
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(caps & ARCH_CAPS_MDS_NO) ? " MDS_NO" : "",
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(caps & ARCH_CAPS_TAA_NO) ? " TAA_NO" : "",
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(caps & ARCH_CAPS_SBDR_SSDP_NO) ? " SBDR_SSDP_NO" : "",
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(caps & ARCH_CAPS_FBSDP_NO) ? " FBSDP_NO" : "",
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(caps & ARCH_CAPS_PSDP_NO) ? " PSDP_NO" : "",
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(e8b & cpufeat_mask(X86_FEATURE_IBRS_ALWAYS)) ? " IBRS_ALWAYS" : "",
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(e8b & cpufeat_mask(X86_FEATURE_STIBP_ALWAYS)) ? " STIBP_ALWAYS" : "",
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(e8b & cpufeat_mask(X86_FEATURE_IBRS_FAST)) ? " IBRS_FAST" : "",
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(e8b & cpufeat_mask(X86_FEATURE_IBRS_SAME_MODE)) ? " IBRS_SAME_MODE" : "");
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/* Hardware features which need driving to mitigate issues. */
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printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s\n",
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printk(" Hardware features:%s%s%s%s%s%s%s%s%s%s%s%s\n",
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(e8b & cpufeat_mask(X86_FEATURE_IBPB)) ||
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(_7d0 & cpufeat_mask(X86_FEATURE_IBRSB)) ? " IBPB" : "",
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(e8b & cpufeat_mask(X86_FEATURE_IBRS)) ||
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@@ -353,7 +356,9 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
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(_7d0 & cpufeat_mask(X86_FEATURE_MD_CLEAR)) ? " MD_CLEAR" : "",
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(_7d0 & cpufeat_mask(X86_FEATURE_SRBDS_CTRL)) ? " SRBDS_CTRL" : "",
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(e8b & cpufeat_mask(X86_FEATURE_VIRT_SSBD)) ? " VIRT_SSBD" : "",
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(caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "");
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(caps & ARCH_CAPS_TSX_CTRL) ? " TSX_CTRL" : "",
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(caps & ARCH_CAPS_FB_CLEAR) ? " FB_CLEAR" : "",
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(caps & ARCH_CAPS_FB_CLEAR_CTRL) ? " FB_CLEAR_CTRL" : "");
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/* Compiled-in support which pertains to mitigations. */
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if ( IS_ENABLED(CONFIG_INDIRECT_THUNK) || IS_ENABLED(CONFIG_SHADOW_PAGING) )
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@@ -56,6 +56,11 @@
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#define ARCH_CAPS_IF_PSCHANGE_MC_NO (_AC(1, ULL) << 6)
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#define ARCH_CAPS_TSX_CTRL (_AC(1, ULL) << 7)
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#define ARCH_CAPS_TAA_NO (_AC(1, ULL) << 8)
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#define ARCH_CAPS_SBDR_SSDP_NO (_AC(1, ULL) << 13)
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#define ARCH_CAPS_FBSDP_NO (_AC(1, ULL) << 14)
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#define ARCH_CAPS_PSDP_NO (_AC(1, ULL) << 15)
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#define ARCH_CAPS_FB_CLEAR (_AC(1, ULL) << 17)
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#define ARCH_CAPS_FB_CLEAR_CTRL (_AC(1, ULL) << 18)
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#define MSR_FLUSH_CMD 0x0000010b
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#define FLUSH_CMD_L1D (_AC(1, ULL) << 0)
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@@ -73,6 +78,7 @@
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#define MCU_OPT_CTRL_RNGDS_MITG_DIS (_AC(1, ULL) << 0)
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#define MCU_OPT_CTRL_RTM_ALLOW (_AC(1, ULL) << 1)
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#define MCU_OPT_CTRL_RTM_LOCKED (_AC(1, ULL) << 2)
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#define MCU_OPT_CTRL_FB_CLEAR_DIS (_AC(1, ULL) << 3)
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#define MSR_RTIT_OUTPUT_BASE 0x00000560
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#define MSR_RTIT_OUTPUT_MASK 0x00000561
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