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x86/pci: introduce hvm_pci_decode_addr
And use it in the ioreq code to decode accesses to the PCI IO ports into bus, slot, function and register values. Signed-off-by: Roger Pau Monné <roger.pau@citrix.com> Reviewed-by: Paul Durrant <paul.durrant@citrix.com>
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@@ -256,6 +256,25 @@ void register_g2m_portio_handler(struct domain *d)
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handler->ops = &g2m_portio_ops;
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}
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unsigned int hvm_pci_decode_addr(unsigned int cf8, unsigned int addr,
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unsigned int *bus, unsigned int *slot,
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unsigned int *func)
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{
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unsigned int bdf;
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ASSERT(CF8_ENABLED(cf8));
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bdf = CF8_BDF(cf8);
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*bus = PCI_BUS(bdf);
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*slot = PCI_SLOT(bdf);
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*func = PCI_FUNC(bdf);
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/*
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* NB: the lower 2 bits of the register address are fetched from the
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* offset into the 0xcfc register when reading/writing to it.
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*/
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return CF8_ADDR_LO(cf8) | (addr & 3);
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}
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/*
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* Local variables:
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* mode: C
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@@ -1178,18 +1178,16 @@ struct hvm_ioreq_server *hvm_select_ioreq_server(struct domain *d,
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CF8_ENABLED(cf8) )
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{
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uint32_t sbdf, x86_fam;
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unsigned int bus, slot, func, reg;
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reg = hvm_pci_decode_addr(cf8, p->addr, &bus, &slot, &func);
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/* PCI config data cycle */
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sbdf = XEN_DMOP_PCI_SBDF(0,
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PCI_BUS(CF8_BDF(cf8)),
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PCI_SLOT(CF8_BDF(cf8)),
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PCI_FUNC(CF8_BDF(cf8)));
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sbdf = XEN_DMOP_PCI_SBDF(0, bus, slot, func);
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type = XEN_DMOP_IO_RANGE_PCI;
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addr = ((uint64_t)sbdf << 32) |
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CF8_ADDR_LO(cf8) |
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(p->addr & 3);
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addr = ((uint64_t)sbdf << 32) | reg;
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/* AMD extended configuration space access? */
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if ( CF8_ADDR_HI(cf8) &&
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d->arch.cpuid->x86_vendor == X86_VENDOR_AMD &&
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@@ -149,6 +149,11 @@ void stdvga_deinit(struct domain *d);
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extern void hvm_dpci_msi_eoi(struct domain *d, int vector);
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/* Decode a PCI port IO access into a bus/slot/func/reg. */
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unsigned int hvm_pci_decode_addr(unsigned int cf8, unsigned int addr,
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unsigned int *bus, unsigned int *slot,
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unsigned int *func);
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/*
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* HVM port IO handler that performs forwarding of guest IO ports into machine
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* IO ports.
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