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[XEN] Assorted further PER_CPU- or read_mostly-ifications.
Signed-off-by: Keir Fraser <keir@xensource.com>
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6 files changed
+47
-50
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@@ -156,7 +156,7 @@ static void vmx_relinquish_guest_resources(struct domain *d)
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#ifdef __x86_64__
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static struct vmx_msr_state percpu_msr[NR_CPUS];
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static DEFINE_PER_CPU(struct vmx_msr_state, percpu_msr);
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static u32 msr_data_index[VMX_MSR_COUNT] =
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{
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@@ -177,7 +177,7 @@ static void vmx_save_segments(struct vcpu *v)
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*/
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static void vmx_load_msrs(void)
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{
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struct vmx_msr_state *host_state = &percpu_msr[smp_processor_id()];
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struct vmx_msr_state *host_state = &this_cpu(percpu_msr);
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int i;
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while ( host_state->flags )
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@@ -190,7 +190,7 @@ static void vmx_load_msrs(void)
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static void vmx_save_init_msrs(void)
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{
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struct vmx_msr_state *host_state = &percpu_msr[smp_processor_id()];
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struct vmx_msr_state *host_state = &this_cpu(percpu_msr);
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int i;
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for ( i = 0; i < VMX_MSR_COUNT; i++ )
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@@ -279,7 +279,7 @@ static inline int long_mode_do_msr_write(struct cpu_user_regs *regs)
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u64 msr_content = regs->eax | ((u64)regs->edx << 32);
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struct vcpu *v = current;
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struct vmx_msr_state *msr = &v->arch.hvm_vmx.msr_content;
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struct vmx_msr_state *host_state = &percpu_msr[smp_processor_id()];
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struct vmx_msr_state *host_state = &this_cpu(percpu_msr);
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HVM_DBG_LOG(DBG_LEVEL_1, "msr 0x%lx msr_content 0x%"PRIx64"\n",
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(unsigned long)regs->ecx, msr_content);
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@@ -361,7 +361,7 @@ static void vmx_restore_msrs(struct vcpu *v)
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unsigned long guest_flags ;
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guest_state = &v->arch.hvm_vmx.msr_content;;
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host_state = &percpu_msr[smp_processor_id()];
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host_state = &this_cpu(percpu_msr);
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wrmsrl(MSR_SHADOW_GS_BASE, guest_state->shadow_gs);
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guest_flags = guest_state->flags;
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+13
-13
@@ -673,7 +673,7 @@ static int __init setup_dump_irqs(void)
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}
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__initcall(setup_dump_irqs);
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static struct timer end_irq_timer[NR_CPUS];
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static DEFINE_PER_CPU(struct timer, end_irq_timer);
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/*
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* force_intack: Forcibly emit all pending EOIs on each CPU every second.
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@@ -682,22 +682,13 @@ static struct timer end_irq_timer[NR_CPUS];
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static void end_irq_timeout(void *unused)
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{
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int cpu = smp_processor_id();
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local_irq_disable();
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flush_all_pending_eoi(NULL);
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local_irq_enable();
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on_selected_cpus(cpu_online_map, flush_ready_eoi, NULL, 1, 0);
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set_timer(&end_irq_timer[cpu], NOW() + MILLISECS(1000));
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}
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static void __init __setup_irq_timeout(void *unused)
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{
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int cpu = smp_processor_id();
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init_timer(&end_irq_timer[cpu], end_irq_timeout, NULL, cpu);
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set_timer(&end_irq_timer[cpu], NOW() + MILLISECS(1000));
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set_timer(&this_cpu(end_irq_timer), NOW() + MILLISECS(1000));
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}
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static int force_intack;
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@@ -705,8 +696,17 @@ boolean_param("force_intack", force_intack);
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static int __init setup_irq_timeout(void)
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{
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if ( force_intack )
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on_each_cpu(__setup_irq_timeout, NULL, 1, 1);
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unsigned int cpu;
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if ( !force_intack )
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return 0;
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for_each_online_cpu ( cpu )
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{
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init_timer(&per_cpu(end_irq_timer, cpu), end_irq_timeout, NULL, cpu);
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set_timer(&per_cpu(end_irq_timer, cpu), NOW() + MILLISECS(1000));
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}
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return 0;
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}
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__initcall(setup_irq_timeout);
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+17
-19
@@ -36,8 +36,8 @@ unsigned int nmi_watchdog = NMI_NONE;
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static unsigned int nmi_hz = HZ;
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static unsigned int nmi_perfctr_msr; /* the MSR to reset in NMI handler */
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static unsigned int nmi_p4_cccr_val;
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static struct timer nmi_timer[NR_CPUS];
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static unsigned int nmi_timer_ticks[NR_CPUS];
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static DEFINE_PER_CPU(struct timer, nmi_timer);
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static DEFINE_PER_CPU(unsigned int, nmi_timer_ticks);
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/*
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* lapic_nmi_owner tracks the ownership of the lapic NMI hardware:
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@@ -132,9 +132,8 @@ int __init check_nmi_watchdog (void)
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static void nmi_timer_fn(void *unused)
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{
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int cpu = smp_processor_id();
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nmi_timer_ticks[cpu]++;
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set_timer(&nmi_timer[cpu], NOW() + MILLISECS(1000));
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this_cpu(nmi_timer_ticks)++;
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set_timer(&this_cpu(nmi_timer), NOW() + MILLISECS(1000));
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}
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static void disable_lapic_nmi_watchdog(void)
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@@ -340,9 +339,8 @@ void __pminit setup_apic_nmi_watchdog(void)
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nmi_active = 1;
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}
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static unsigned int
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last_irq_sums [NR_CPUS],
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alert_counter [NR_CPUS];
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static DEFINE_PER_CPU(unsigned int, last_irq_sums);
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static DEFINE_PER_CPU(unsigned int, alert_counter);
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static atomic_t watchdog_disable_count = ATOMIC_INIT(1);
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@@ -366,35 +364,35 @@ void watchdog_enable(void)
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*/
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for_each_online_cpu ( cpu )
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{
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init_timer(&nmi_timer[cpu], nmi_timer_fn, NULL, cpu);
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set_timer(&nmi_timer[cpu], NOW());
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init_timer(&per_cpu(nmi_timer, cpu), nmi_timer_fn, NULL, cpu);
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set_timer(&per_cpu(nmi_timer, cpu), NOW());
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}
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}
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void nmi_watchdog_tick(struct cpu_user_regs * regs)
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{
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int sum, cpu = smp_processor_id();
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unsigned int sum = this_cpu(nmi_timer_ticks);
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sum = nmi_timer_ticks[cpu];
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if ( (last_irq_sums[cpu] == sum) && !atomic_read(&watchdog_disable_count) )
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if ( (this_cpu(last_irq_sums) == sum) &&
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!atomic_read(&watchdog_disable_count) )
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{
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/*
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* Ayiee, looks like this CPU is stuck ... wait a few IRQs (5 seconds)
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* before doing the oops ...
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*/
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alert_counter[cpu]++;
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if ( alert_counter[cpu] == 5*nmi_hz )
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this_cpu(alert_counter)++;
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if ( this_cpu(alert_counter) == 5*nmi_hz )
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{
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console_force_unlock();
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printk("Watchdog timer detects that CPU%d is stuck!\n", cpu);
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printk("Watchdog timer detects that CPU%d is stuck!\n",
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smp_processor_id());
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fatal_trap(TRAP_nmi, regs);
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}
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}
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else
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{
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last_irq_sums[cpu] = sum;
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alert_counter[cpu] = 0;
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this_cpu(last_irq_sums) = sum;
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this_cpu(alert_counter) = 0;
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}
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if ( nmi_perfctr_msr )
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@@ -19,7 +19,7 @@
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#include <public/callback.h>
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/* All CPUs have their own IDT to allow int80 direct trap. */
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idt_entry_t *idt_tables[NR_CPUS] = { 0 };
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idt_entry_t *idt_tables[NR_CPUS] __read_mostly;
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void show_registers(struct cpu_user_regs *regs)
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{
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+5
-5
@@ -33,7 +33,7 @@ struct domain *domain_list;
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struct domain *dom0;
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struct vcpu *idle_vcpu[NR_CPUS];
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struct vcpu *idle_vcpu[NR_CPUS] __read_mostly;
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struct domain *alloc_domain(domid_t domid)
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{
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@@ -245,15 +245,15 @@ void __domain_crash_synchronous(void)
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}
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static struct domain *domain_shuttingdown[NR_CPUS];
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static DEFINE_PER_CPU(struct domain *, domain_shuttingdown);
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static void domain_shutdown_finalise(void)
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{
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struct domain *d;
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struct vcpu *v;
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d = domain_shuttingdown[smp_processor_id()];
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domain_shuttingdown[smp_processor_id()] = NULL;
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d = this_cpu(domain_shuttingdown);
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this_cpu(domain_shuttingdown) = NULL;
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BUG_ON(d == NULL);
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BUG_ON(d == current->domain);
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@@ -302,7 +302,7 @@ void domain_shutdown(struct domain *d, u8 reason)
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vcpu_sleep_nosync(v);
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get_knownalive_domain(d);
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domain_shuttingdown[smp_processor_id()] = d;
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this_cpu(domain_shuttingdown) = d;
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raise_softirq(DOMAIN_SHUTDOWN_FINALISE_SOFTIRQ);
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}
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@@ -67,7 +67,7 @@ static struct scheduler ops;
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: (typeof(ops.fn(__VA_ARGS__)))0 )
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/* Per-CPU periodic timer sends an event to the currently-executing domain. */
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static struct timer t_timer[NR_CPUS];
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static DEFINE_PER_CPU(struct timer, t_timer);
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static inline void vcpu_runstate_change(
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struct vcpu *v, int new_state, s_time_t new_entry_time)
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@@ -593,10 +593,9 @@ static void s_timer_fn(void *unused)
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/* Periodic tick timer: send timer event to current domain */
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static void t_timer_fn(void *unused)
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{
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struct vcpu *v = current;
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unsigned int cpu = smp_processor_id();
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struct vcpu *v = current;
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per_cpu(schedule_data, cpu).tick++;
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this_cpu(schedule_data).tick++;
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if ( !is_idle_vcpu(v) )
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{
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@@ -606,9 +605,9 @@ static void t_timer_fn(void *unused)
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page_scrub_schedule_work();
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SCHED_OP(tick, cpu);
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SCHED_OP(tick, smp_processor_id());
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set_timer(&t_timer[cpu], NOW() + MILLISECS(10));
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set_timer(&this_cpu(t_timer), NOW() + MILLISECS(10));
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}
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/* Per-VCPU timer function: sends a virtual timer interrupt. */
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@@ -637,7 +636,7 @@ void __init scheduler_init(void)
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{
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spin_lock_init(&per_cpu(schedule_data, i).schedule_lock);
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init_timer(&per_cpu(schedule_data, i).s_timer, s_timer_fn, NULL, i);
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init_timer(&t_timer[i], t_timer_fn, NULL, i);
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init_timer(&per_cpu(t_timer, i), t_timer_fn, NULL, i);
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}
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for ( i = 0; schedulers[i] != NULL; i++ )
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