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Data structures for Nested Virtualization
Signed-off-by: Christoph Egger <Christoph.Egger@amd.com> Acked-by: Eddie Dong <eddie.dong@intel.com> Acked-by: Tim Deegan <Tim.Deegan@citrix.com> Committed-by: Tim Deegan <Tim.Deegan@citrix.com>
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@@ -52,7 +52,8 @@ enum hvm_intblk {
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hvm_intblk_shadow, /* MOV-SS or STI shadow */
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hvm_intblk_rflags_ie, /* RFLAGS.IE == 0 */
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hvm_intblk_tpr, /* LAPIC TPR too high */
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hvm_intblk_nmi_iret /* NMI blocked until IRET */
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hvm_intblk_nmi_iret, /* NMI blocked until IRET */
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hvm_intblk_arch, /* SVM/VMX specific reason */
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};
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/* These happen to be the same as the VMX interrupt shadow definitions. */
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@@ -36,6 +36,38 @@ enum hvm_io_state {
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HVMIO_completed
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};
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#define VMCX_EADDR (~0ULL)
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struct nestedvcpu {
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bool_t nv_guestmode; /* vcpu in guestmode? */
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void *nv_vvmcx; /* l1 guest virtual VMCB/VMCS */
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void *nv_n1vmcx; /* VMCB/VMCS used to run l1 guest */
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void *nv_n2vmcx; /* shadow VMCB/VMCS used to run l2 guest */
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uint64_t nv_vvmcxaddr; /* l1 guest physical address of nv_vvmcx */
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uint64_t nv_n1vmcx_pa; /* host physical address of nv_n1vmcx */
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uint64_t nv_n2vmcx_pa; /* host physical address of nv_n2vmcx */
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/* SVM/VMX arch specific */
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union {
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} u;
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bool_t nv_flushp2m; /* True, when p2m table must be flushed */
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struct p2m_domain *nv_p2m; /* used p2m table for this vcpu */
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bool_t nv_vmentry_pending;
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bool_t nv_vmexit_pending;
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bool_t nv_vmswitch_in_progress; /* true during vmentry/vmexit emulation */
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/* Does l1 guest intercept io ports 0x80 and/or 0xED ?
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* Useful to optimize io permission handling.
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*/
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bool_t nv_ioport80;
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bool_t nv_ioportED;
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};
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#define vcpu_nestedhvm(v) ((v)->arch.hvm_vcpu.nvcpu)
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struct hvm_vcpu {
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/* Guest control-register and EFER values, just as the guest sees them. */
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unsigned long guest_cr[5];
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@@ -81,6 +113,8 @@ struct hvm_vcpu {
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struct tasklet assert_evtchn_irq_tasklet;
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struct nestedvcpu nvcpu;
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struct mtrr_state mtrr;
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u64 pat_cr;
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