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xen/arm32: entry: Fold the macro SAVE_ALL in the macro vector
Follow-up rework will require the macro vector to distinguish between a trap from a guest vs while in the hypervisor. The macro SAVE_ALL already has code to distinguish between the two and it is only called by the vector macro. So fold the former into the latter. This will help to avoid duplicating the check. This is part of XSA-303. Reported-by: Julien Grall <Julien.Grall@arm.com> Signed-off-by: Julien Grall <julien.grall@arm.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
Julien Grall authored and Jan Beulich committed
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6eeef7ecae
commit
a7b81b021e
1 file changed
+23
-23
+23
-23
@@ -13,27 +13,6 @@
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#define RESTORE_BANKED(mode) \
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RESTORE_ONE_BANKED(SP_##mode) ; RESTORE_ONE_BANKED(LR_##mode) ; RESTORE_ONE_BANKED(SPSR_##mode)
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#define SAVE_ALL \
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sub sp, #(UREGS_SP_usr - UREGS_sp); /* SP, LR, SPSR, PC */ \
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push {r0-r12}; /* Save R0-R12 */ \
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\
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mrs r11, ELR_hyp; /* ELR_hyp is return address. */\
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str r11, [sp, #UREGS_pc]; \
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\
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str lr, [sp, #UREGS_lr]; \
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\
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add r11, sp, #UREGS_kernel_sizeof+4; \
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str r11, [sp, #UREGS_sp]; \
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\
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mrc CP32(r11, HSR); /* Save exception syndrome */ \
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str r11, [sp, #UREGS_hsr]; \
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\
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mrs r11, SPSR_hyp; \
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str r11, [sp, #UREGS_cpsr]; \
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and r11, #PSR_MODE_MASK; \
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cmp r11, #PSR_MODE_HYP; \
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blne save_guest_regs
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save_guest_regs:
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#ifdef CONFIG_ARM32_HARDEN_BRANCH_PREDICTOR
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/*
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@@ -52,7 +31,7 @@ save_guest_regs:
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ldr r11, =0xffffffff /* Clobber SP which is only valid for hypervisor frames. */
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str r11, [sp, #UREGS_sp]
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SAVE_ONE_BANKED(SP_usr)
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/* LR_usr is the same physical register as lr and is saved in SAVE_ALL */
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/* LR_usr is the same physical register as lr and is saved by the caller */
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SAVE_BANKED(svc)
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SAVE_BANKED(abt)
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SAVE_BANKED(und)
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@@ -131,7 +110,28 @@ skip_check:
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* interrupts (Asynchronous Abort, IRQ, FIQ) to unmask.
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*/
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.macro vector trap, iflags
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SAVE_ALL
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/* Save registers in the stack */
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sub sp, #(UREGS_SP_usr - UREGS_sp) /* SP, LR, SPSR, PC */
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push {r0-r12} /* Save R0-R12 */
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mrs r11, ELR_hyp /* ELR_hyp is return address */
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str r11, [sp, #UREGS_pc]
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str lr, [sp, #UREGS_lr]
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add r11, sp, #(UREGS_kernel_sizeof + 4)
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str r11, [sp, #UREGS_sp]
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mrc CP32(r11, HSR) /* Save exception syndrome */
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str r11, [sp, #UREGS_hsr]
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mrs r11, SPSR_hyp
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str r11, [sp, #UREGS_cpsr]
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and r11, #PSR_MODE_MASK
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cmp r11, #PSR_MODE_HYP
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blne save_guest_regs
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/* We are ready to handle the trap, setup the registers and jump. */
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cpsie \iflags
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adr lr, return_from_trap
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mov r0, sp
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