iommu: setup inclusive mappings before enabling iommu

Or else it can lead to freezes when enabling the iommu on certain
Intel hardware:

[...]
(XEN) ELF: addresses:
(XEN)     virt_base        = 0xffffffff80000000
(XEN)     elf_paddr_offset = 0x0
(XEN)     virt_offset      = 0xffffffff80000000
(XEN)     virt_kstart      = 0xffffffff81000000
(XEN)     virt_kend        = 0xffffffff82953000
(XEN)     virt_entry       = 0xffffffff8274e180
(XEN)     p2m_base         = 0x8000000000
(XEN)  Xen  kernel: 64-bit, lsb, compat32
(XEN)  Dom0 kernel: 64-bit, PAE, lsb, paddr 0x1000000 -> 0x295300
<freeze>

This restores the behavior before commit 66a9274cc3 that changed
the order and enabled the iommu without having the inclusive mappings
setup.

Note that on AMD hardware the order is also changed to add inclusive
mappings before adding any devices.

Reported-by: Dario Faggioli <dfaggioli@suse.com>
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Tested-by: Dario Faggioli <dfaggioli@suse.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Julien Grall <julien.grall@arm.com>
This commit is contained in:
Roger Pau Monné authored and Jan Beulich committed 2018-09-21 12:22:38 +02:00
1 parent 2de083a118
commit a8bee8afb7
5 files changed
+14 -10

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@@ -300,6 +300,8 @@ static void __hwdom_init amd_iommu_hwdom_init(struct domain *d)
IOMMU_MMIO_REGION_LENGTH - 1)) )
BUG();
/* Make sure workarounds are applied (if needed) before adding devices. */
arch_iommu_hwdom_init(d);
setup_hwdom_pci_devices(d, amd_iommu_add_device);
}
+2
View File
@@ -2736,6 +2736,8 @@ static void __hwdom_init arm_smmu_iommu_hwdom_init(struct domain *d)
printk(XENLOG_WARNING
"map-reserved dom0-iommu option is not supported on ARM\n");
iommu_hwdom_reserved = 0;
arch_iommu_hwdom_init(d);
}
static void arm_smmu_iommu_domain_teardown(struct domain *d)
-10
View File
@@ -238,16 +238,6 @@ void __hwdom_init iommu_hwdom_init(struct domain *d)
}
hd->platform_ops->hwdom_init(d);
ASSERT(iommu_hwdom_inclusive != -1 && iommu_hwdom_inclusive != -1);
if ( iommu_hwdom_inclusive && !is_pv_domain(d) )
{
printk(XENLOG_WARNING
"IOMMU inclusive mappings are only supported on PV Dom0\n");
iommu_hwdom_inclusive = 0;
}
arch_iommu_hwdom_init(d);
}
void iommu_teardown(struct domain *d)
+2
View File
@@ -1313,6 +1313,8 @@ static void __hwdom_init intel_iommu_hwdom_init(struct domain *d)
setup_hwdom_pci_devices(d, setup_hwdom_device);
setup_hwdom_rmrr(d);
/* Make sure workarounds are applied before enabling the IOMMU(s). */
arch_iommu_hwdom_init(d);
if ( iommu_flush_all() )
printk(XENLOG_WARNING VTDPREFIX
+8
View File
@@ -210,6 +210,14 @@ void __hwdom_init arch_iommu_hwdom_init(struct domain *d)
BUG_ON(!is_hardware_domain(d));
ASSERT(iommu_hwdom_inclusive != -1 && iommu_hwdom_inclusive != -1);
if ( iommu_hwdom_inclusive && !is_pv_domain(d) )
{
printk(XENLOG_WARNING
"IOMMU inclusive mappings are only supported on PV Dom0\n");
iommu_hwdom_inclusive = 0;
}
if ( iommu_hwdom_passthrough )
return;
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