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xen/arm: Avoid overflow using MIDR_IMPLEMENTOR_MASK
Value of macro MIDR_IMPLEMENTOR_MASK exceeds the range of integer and can lead to overflow. Currently there is no issue as it is used in an expression implicitly casted to u32 in MIDR_IS_CPU_MODEL_RANGE. To avoid possible problems, fix the macro. Signed-off-by: Michal Orzel <michal.orzel@arm.com> Link: https://lore.kernel.org/r/20220426070603.56031-1-michal.orzel@arm.com Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Julien Grall <jgrall@amazon.com>
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@@ -39,7 +39,7 @@
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#define MIDR_VARIANT(midr) \
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(((midr) & MIDR_VARIANT_MASK) >> MIDR_VARIANT_SHIFT)
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#define MIDR_IMPLEMENTOR_SHIFT 24
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#define MIDR_IMPLEMENTOR_MASK (0xff << MIDR_IMPLEMENTOR_SHIFT)
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#define MIDR_IMPLEMENTOR_MASK (0xffU << MIDR_IMPLEMENTOR_SHIFT)
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#define MIDR_IMPLEMENTOR(midr) \
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(((midr) & MIDR_IMPLEMENTOR_MASK) >> MIDR_IMPLEMENTOR_SHIFT)
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