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xen/arm32: head: Jump to the runtime mapping in enable_mmu()
At the moment, enable_mmu() will return to an address in the 1:1 mapping and each path is responsible to switch to the runtime mapping. In a follow-up patch, the behavior to switch to the runtime mapping will become more complex. So to avoid more code/comment duplication, move the switch in enable_mmu(). Lastly, take the opportunity to replace load from literal pool with mov_w. Signed-off-by: Julien Grall <jgrall@amazon.com> Reviewed-by: Stefano Stabellini <sstabellini@kernel.org> Tested-by: Henry Wang <Henry.Wang@arm.com>
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@@ -167,19 +167,11 @@ past_zImage:
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bl check_cpu_mode
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bl cpu_init
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bl create_page_tables
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bl enable_mmu
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/* We are still in the 1:1 mapping. Jump to the runtime Virtual Address. */
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mov_w r0, primary_switched
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mov pc, r0
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/* Address in the runtime mapping to jump to after the MMU is enabled */
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mov_w lr, primary_switched
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b enable_mmu
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primary_switched:
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/*
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* The 1:1 map may clash with other parts of the Xen virtual memory
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* layout. As it is not used anymore, remove it completely to
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* avoid having to worry about replacing existing mapping
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* afterwards.
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*/
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bl remove_identity_mapping
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bl setup_fixmap
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#ifdef CONFIG_EARLY_PRINTK
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/* Use a virtual address to access the UART. */
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@@ -223,12 +215,10 @@ GLOBAL(init_secondary)
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bl check_cpu_mode
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bl cpu_init
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bl create_page_tables
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bl enable_mmu
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/* We are still in the 1:1 mapping. Jump to the runtime Virtual Address. */
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mov_w r0, secondary_switched
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mov pc, r0
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/* Address in the runtime mapping to jump to after the MMU is enabled */
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mov_w lr, secondary_switched
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b enable_mmu
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secondary_switched:
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/*
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* Non-boot CPUs need to move on to the proper pagetables, which were
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@@ -523,9 +513,12 @@ virtphys_clash:
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ENDPROC(create_page_tables)
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/*
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* Turn on the Data Cache and the MMU. The function will return on the 1:1
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* mapping. In other word, the caller is responsible to switch to the runtime
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* mapping.
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* Turn on the Data Cache and the MMU. The function will return
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* to the virtual address provided in LR (e.g. the runtime mapping).
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*
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* Inputs:
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* r9 : paddr(start)
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* lr : Virtual address to return to
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*
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* Clobbers r0 - r3
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*/
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@@ -551,7 +544,24 @@ enable_mmu:
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dsb /* Flush PTE writes and finish reads */
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mcr CP32(r0, HSCTLR) /* now paging is enabled */
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isb /* Now, flush the icache */
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mov pc, lr
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/*
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* The MMU is turned on and we are in the 1:1 mapping. Switch
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* to the runtime mapping.
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*/
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mov_w r0, 1f
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mov pc, r0
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1:
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/*
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* The 1:1 map may clash with other parts of the Xen virtual memory
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* layout. As it is not used anymore, remove it completely to
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* avoid having to worry about replacing existing mapping
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* afterwards.
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*
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* On return this will jump to the virtual address requested by
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* the caller.
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*/
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b remove_identity_mapping
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ENDPROC(enable_mmu)
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/*
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