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x86/entry: Avoid register spilling in cr4_pv32_restore()
cr4_pv32_restore() needs two registers. Right now, it spills %rdx and clobbers %rax. However, %rcx is free to use at all callsites. Annotate CR4_PV32_RESTORE with our usual clobber comments, and swap %rdx for %rcx in the non-fatal paths Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com>
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Andrew Cooper committed
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2 files changed
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@@ -23,7 +23,7 @@ FUNC(entry_int82)
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sti
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CR4_PV32_RESTORE
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CR4_PV32_RESTORE /* Clob: ac */
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GET_CURRENT(bx)
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@@ -163,17 +163,15 @@ FUNC(compat_restore_all_guest)
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_ASM_PRE_EXTABLE(.Lft0, handle_exception)
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END(compat_restore_all_guest)
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/* This mustn't modify registers other than %rax. */
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/* Callers can cope with both %rax and %rcx being clobbered. */
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FUNC(cr4_pv32_restore)
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push %rdx
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GET_CPUINFO_FIELD(cr4, dx)
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mov (%rdx), %rax
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GET_CPUINFO_FIELD(cr4, cx)
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mov (%rcx), %rax
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test $XEN_CR4_PV32_BITS, %eax
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jnz 0f
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or cr4_pv32_mask(%rip), %rax
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mov %rax, %cr4
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mov %rax, (%rdx)
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pop %rdx
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mov %rax, (%rcx)
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ret
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0:
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#ifndef NDEBUG
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@@ -191,7 +189,6 @@ FUNC(cr4_pv32_restore)
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BUG
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1:
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#endif
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pop %rdx
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xor %eax, %eax
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ret
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END(cr4_pv32_restore)
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@@ -227,7 +224,7 @@ UNLIKELY_END(compat_syscall_gpf)
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END(compat_syscall)
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FUNC(compat_sysenter)
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CR4_PV32_RESTORE
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CR4_PV32_RESTORE /* Clob: ac */
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movq VCPU_trap_ctxt(%rbx),%rcx
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cmpb $X86_EXC_GP, UREGS_entry_vector(%rsp)
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movzwl VCPU_sysenter_sel(%rbx),%eax
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@@ -242,7 +239,7 @@ FUNC(compat_sysenter)
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END(compat_sysenter)
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FUNC(compat_int80_direct_trap)
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CR4_PV32_RESTORE
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CR4_PV32_RESTORE /* Clob: ac */
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call compat_create_bounce_frame
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jmp compat_test_all_events
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END(compat_int80_direct_trap)
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@@ -309,7 +309,7 @@ FUNC(cstar_enter)
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.Lcstar_cr3_okay:
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sti
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CR4_PV32_RESTORE
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CR4_PV32_RESTORE /* Clob: ac */
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movq STACK_CPUINFO_FIELD(current_vcpu)(%rbx), %rbx
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@@ -712,7 +712,7 @@ FUNC(common_interrupt)
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cmovnz %r12d, %ebx
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.Lintr_cr3_okay:
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CR4_PV32_RESTORE
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CR4_PV32_RESTORE /* Clob: ac */
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movq %rsp,%rdi
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callq do_IRQ
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mov %r15, STACK_CPUINFO_FIELD(xen_cr3)(%r14)
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@@ -762,7 +762,7 @@ handle_exception_saved:
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jz .Lcr4_pv32_done
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cmpb $0,DOMAIN_is_32bit_pv(%rax)
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je .Lcr4_pv32_done
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call cr4_pv32_restore
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call cr4_pv32_restore /* Clob: ac */
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/*
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* An NMI or #MC may occur between clearing CR4.SMEP / CR4.SMAP in
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* compat_restore_all_guest and it actually returning to guest
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@@ -1046,7 +1046,7 @@ FUNC(handle_ist_exception)
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.List_cr3_okay:
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#ifdef CONFIG_PV
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CR4_PV32_RESTORE
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CR4_PV32_RESTORE /* Clob: ac */
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testb $3,UREGS_cs(%rsp)
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jz 1f
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/*
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