This patch remove the L2 pin for 1:1 page table on control panel.

L2 pin for 1:1 page table on control panel cause entries for top 64M
address changed by alloc_l2_table().

Signed-off-by: Yunhong Jiang <yunhong.jiang@intel.com>

tools/libxc/xc_vmx_build.c

@@ -578,15 +578,6 @@ static int setup_guest(int xc_handle,
     sp->sp_global.eport = control_evtchn;
     munmap(sp, PAGE_SIZE);
 
-    /*
-     * Pin down l2tab addr as page dir page - causes hypervisor to provide
-     * correct protection for the page
-     */ 
-#ifdef __i386__
-    if ( pin_table(xc_handle, MMUEXT_PIN_L2_TABLE, l2tab>>PAGE_SHIFT, dom) )
-        goto error_out;
-#endif
-
     /* Send the page update requests down to the hypervisor. */
     if ( xc_finish_mmu_updates(xc_handle, mmu) )
         goto error_out;

xen/arch/x86/domain.c

@@ -461,14 +461,11 @@ int arch_set_info_guest(
         if ( !get_page(&frame_table[phys_basetab>>PAGE_SHIFT], d) )
             return -EINVAL;
     }
-    else
+    else if ( !(c->flags & VGCF_VMX_GUEST) )
     {
-#ifdef __x86_64__
-        if ( !(c->flags & VGCF_VMX_GUEST) )
-#endif
-            if ( !get_page_and_type(&frame_table[phys_basetab>>PAGE_SHIFT], d, 
-                                    PGT_base_page_table) )
-                return -EINVAL;
+        if ( !get_page_and_type(&frame_table[phys_basetab>>PAGE_SHIFT], d, 
+                                PGT_base_page_table) )
+            return -EINVAL;
     }
 
     if ( (rc = (int)set_gdt(v, c->gdt_frames, c->gdt_ents)) != 0 )

xen/arch/x86/vmx.c

@@ -1082,11 +1082,6 @@ static int vmx_set_cr0(unsigned long value)
             VMX_DBG_LOG(DBG_LEVEL_1, "enable PAE on cr4\n");
             __vmwrite(GUEST_CR4, crn | X86_CR4_PAE);
         }
-#elif defined( __i386__)
-        unsigned long old_base_mfn;
-        old_base_mfn = pagetable_get_pfn(d->arch.guest_table);
-        if (old_base_mfn)
-            put_page(pfn_to_page(old_base_mfn));
 #endif
         /*
          * Now arch.guest_table points to machine physical.