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x86/cpuid: Infrastructure for leaves 7:1{ecx,edx}
We don't actually need ecx yet, but adding it in now will reduce the amount to which leaf 7 is out of order in a featureset. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com>
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@@ -204,6 +204,14 @@ static const char *const str_7b1[32] =
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[ 0] = "ppin",
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};
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static const char *const str_7c1[32] =
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{
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};
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static const char *const str_7d1[32] =
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{
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};
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static const char *const str_7d2[32] =
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{
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[ 0] = "intel-psfd",
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@@ -231,6 +239,8 @@ static const struct {
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{ "0x80000021.eax", "e21a", str_e21a },
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{ "0x00000007:1.ebx", "7b1", str_7b1 },
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{ "0x00000007:2.edx", "7d2", str_7d2 },
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{ "0x00000007:1.ecx", "7c1", str_7c1 },
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{ "0x00000007:1.edx", "7d1", str_7d1 },
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};
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#define COL_ALIGN "18"
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@@ -453,7 +453,8 @@ static void generic_identify(struct cpuinfo_x86 *c)
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cpuid_count(7, 1,
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&c->x86_capability[FEATURESET_7a1],
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&c->x86_capability[FEATURESET_7b1],
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&tmp, &tmp);
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&c->x86_capability[FEATURESET_7c1],
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&c->x86_capability[FEATURESET_7d1]);
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if (max_subleaf >= 2)
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cpuid_count(7, 2,
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&tmp, &tmp, &tmp,
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@@ -297,6 +297,10 @@ XEN_CPUFEATURE(RRSBA_CTRL, 13*32+ 2) /* MSR_SPEC_CTRL.RRSBA_DIS_* */
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XEN_CPUFEATURE(BHI_CTRL, 13*32+ 4) /* MSR_SPEC_CTRL.BHI_DIS_S */
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XEN_CPUFEATURE(MCDT_NO, 13*32+ 5) /*A MCDT_NO */
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/* Intel-defined CPU features, CPUID level 0x00000007:1.ecx, word 14 */
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/* Intel-defined CPU features, CPUID level 0x00000007:1.edx, word 15 */
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#endif /* XEN_CPUFEATURE */
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/* Clean up from a default include. Close the enum (for C). */
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@@ -18,6 +18,8 @@
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#define FEATURESET_e21a 11 /* 0x80000021.eax */
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#define FEATURESET_7b1 12 /* 0x00000007:1.ebx */
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#define FEATURESET_7d2 13 /* 0x00000007:2.edx */
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#define FEATURESET_7c1 14 /* 0x00000007:1.ecx */
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#define FEATURESET_7d1 15 /* 0x00000007:1.edx */
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struct cpuid_leaf
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{
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@@ -194,7 +196,14 @@ struct cpuid_policy
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uint32_t _7b1;
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struct { DECL_BITFIELD(7b1); };
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};
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uint32_t /* c */:32, /* d */:32;
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union {
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uint32_t _7c1;
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struct { DECL_BITFIELD(7c1); };
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};
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union {
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uint32_t _7d1;
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struct { DECL_BITFIELD(7d1); };
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};
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/* Subleaf 2. */
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uint32_t /* a */:32, /* b */:32, /* c */:32;
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@@ -343,6 +352,8 @@ static inline void cpuid_policy_to_featureset(
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fs[FEATURESET_e21a] = p->extd.e21a;
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fs[FEATURESET_7b1] = p->feat._7b1;
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fs[FEATURESET_7d2] = p->feat._7d2;
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fs[FEATURESET_7c1] = p->feat._7c1;
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fs[FEATURESET_7d1] = p->feat._7d1;
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}
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/* Fill in a CPUID policy from a featureset bitmap. */
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@@ -363,6 +374,8 @@ static inline void cpuid_featureset_to_policy(
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p->extd.e21a = fs[FEATURESET_e21a];
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p->feat._7b1 = fs[FEATURESET_7b1];
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p->feat._7d2 = fs[FEATURESET_7d2];
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p->feat._7c1 = fs[FEATURESET_7c1];
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p->feat._7d1 = fs[FEATURESET_7d1];
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}
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static inline uint64_t cpuid_policy_xcr0_max(const struct cpuid_policy *p)
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