x86/mce: change parameter names in function definitions to match the corresponding declarations

Change parameter names in function definitions to match the
corresponding delcarations thus fixing violations of MISRA C:2012
Rule 8.3 ("All declarations of an object or function shall use the same
names and type qualifiers").

Signed-off-by: Federico Serafini <federico.serafini@bugseng.com>
[jb: while there also add const to amd_mcheck_init()]
Acked-by: Jan Beulich <jbeulich@suse.com>

xen/arch/x86/cpu/mcheck/mce.c

@@ -123,7 +123,7 @@ void mce_recoverable_register(mce_recoverable_t cbfunc)
     mc_recoverable_scan = cbfunc;
 }
 
-struct mca_banks *mcabanks_alloc(unsigned int nr_mce_banks)
+struct mca_banks *mcabanks_alloc(unsigned int nr)
 {
     struct mca_banks *mb;
 
@@ -135,18 +135,17 @@ struct mca_banks *mcabanks_alloc(unsigned int nr_mce_banks)
      * For APs allocations get done by the BSP, i.e. when the bank count may
      * may not be known yet. A zero bank count is a clear indication of this.
      */
-    if ( !nr_mce_banks )
-        nr_mce_banks = MCG_CAP_COUNT;
+    if ( !nr )
+        nr = MCG_CAP_COUNT;
 
-    mb->bank_map = xzalloc_array(unsigned long,
-                                 BITS_TO_LONGS(nr_mce_banks));
+    mb->bank_map = xzalloc_array(unsigned long, BITS_TO_LONGS(nr));
     if ( !mb->bank_map )
     {
         xfree(mb);
         return NULL;
     }
 
-    mb->num = nr_mce_banks;
+    mb->num = nr;
 
     return mb;
 }

xen/arch/x86/cpu/mcheck/mce.h

@@ -43,7 +43,7 @@ extern uint8_t cmci_apic_vector;
 extern bool lmce_support;
 
 /* Init functions */
-enum mcheck_type amd_mcheck_init(struct cpuinfo_x86 *c);
+enum mcheck_type amd_mcheck_init(const struct cpuinfo_x86 *c);
 enum mcheck_type intel_mcheck_init(struct cpuinfo_x86 *c, bool bsp);
 
 void amd_nonfatal_mcheck_init(struct cpuinfo_x86 *c);

xen/arch/x86/cpu/mcheck/mce_amd.c

@@ -272,13 +272,13 @@ int vmce_amd_rdmsr(const struct vcpu *v, uint32_t msr, uint64_t *val)
 }
 
 enum mcheck_type
-amd_mcheck_init(struct cpuinfo_x86 *ci)
+amd_mcheck_init(const struct cpuinfo_x86 *c)
 {
     uint32_t i;
     enum mcequirk_amd_flags quirkflag = 0;
 
-    if ( ci->x86_vendor != X86_VENDOR_HYGON )
-        quirkflag = mcequirk_lookup_amd_quirkdata(ci);
+    if ( c->x86_vendor != X86_VENDOR_HYGON )
+        quirkflag = mcequirk_lookup_amd_quirkdata(c);
 
     /* Assume that machine check support is available.
      * The minimum provided support is at least the K8. */
@@ -298,14 +298,14 @@ amd_mcheck_init(struct cpuinfo_x86 *ci)
         }
     }
 
-    if ( ci->x86 == 0xf )
+    if ( c->x86 == 0xf )
         return mcheck_amd_k8;
 
     if ( quirkflag == MCEQUIRK_F10_GART )
         mcequirk_amd_apply(quirkflag);
 
-    if ( cpu_has(ci, X86_FEATURE_AMD_PPIN) &&
-         (ci == &boot_cpu_data || ppin_msr) )
+    if ( cpu_has(c, X86_FEATURE_AMD_PPIN) &&
+         (c == &boot_cpu_data || ppin_msr) )
     {
         uint64_t val;
 
@@ -320,7 +320,7 @@ amd_mcheck_init(struct cpuinfo_x86 *ci)
 
         if ( !(val & PPIN_ENABLE) )
             ppin_msr = 0;
-        else if ( ci == &boot_cpu_data )
+        else if ( c == &boot_cpu_data )
             ppin_msr = MSR_AMD_PPIN;
     }
 
@@ -328,6 +328,6 @@ amd_mcheck_init(struct cpuinfo_x86 *ci)
     mce_recoverable_register(mc_amd_recoverable_scan);
     mce_register_addrcheck(mc_amd_addrcheck);
 
-    return ci->x86_vendor == X86_VENDOR_HYGON ?
+    return c->x86_vendor == X86_VENDOR_HYGON ?
             mcheck_hygon : mcheck_amd_famXX;
 }