linux-i386: cleanup head.S, sync default_ldt and {new,boot}_cpu_data with native.

Signed-off-by: Christian Limpach <Christian.Limpach@cl.cam.ac.uk>
This commit is contained in:
cl349@firebug.cl.cam.ac.uk committed 2006-02-24 14:41:45 +00:00
1 parent c6ba49142d
commit bb5d5f577a
4 files changed
+39 -62

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@@ -25,11 +25,6 @@
ENTRY(startup_32)
movl %esi,xen_start_info
#if 0
ENTRY(startup_32_smp)
#endif /* CONFIG_SMP */
cld
/* Set up the stack pointer */
@@ -57,29 +52,42 @@ checkCPUtype:
movb %cl,X86_MASK
movl %edx,X86_CAPABILITY
movb $1,X86_HARD_MATH
xorl %eax,%eax # Clear FS/GS and LDT
movl %eax,%fs
movl %eax,%gs
cld # gcc2 wants the direction flag cleared at all times
#if 0
movb ready, %cl
movb $1, ready
cmpb $0,%cl
je 1f # the first CPU calls start_kernel
# all other CPUs call initialize_secondary
call initialize_secondary
jmp L6
1:
#endif /* CONFIG_SMP */
call start_kernel
L6:
jmp L6 # main should never return here, but
# just in case, we know what happens.
ALIGN
#define HYPERCALL_PAGE_OFFSET 0x1000
.org HYPERCALL_PAGE_OFFSET
ENTRY(hypercall_page)
.skip 0x1000
# boot GDT descriptor (later on used by CPU#0):
/*
* Real beginning of normal "text" segment
*/
ENTRY(stext)
ENTRY(_stext)
/*
* BSS section
*/
.section ".bss.page_aligned","w"
ENTRY(empty_zero_page)
.fill 4096,1,0
/*
* This starts the data section.
*/
.data
ALIGN
.word 0 # 32 bit align gdt_desc.address
.globl cpu_gdt_descr
cpu_gdt_descr:
@@ -88,10 +96,10 @@ cpu_gdt_descr:
.fill NR_CPUS-1,8,0 # space for the other GDT descriptors
.org 0x1000
ENTRY(empty_zero_page)
.org 0x2000
/*
* The Global Descriptor Table contains 28 quadwords, per-CPU.
*/
.align PAGE_SIZE_asm
ENTRY(cpu_gdt_table)
.quad 0x0000000000000000 /* NULL descriptor */
.quad 0x0000000000000000 /* 0x0b reserved */
@@ -106,10 +114,10 @@ ENTRY(cpu_gdt_table)
.quad 0x0000000000000000 /* 0x53 reserved */
.quad 0x0000000000000000 /* 0x5b reserved */
.quad 0x00cf9b000000ffff /* 0x60 kernel 4GB code at 0x00000000 */
.quad 0x00cf93000000ffff /* 0x68 kernel 4GB data at 0x00000000 */
.quad 0x00cffb000000ffff /* 0x73 user 4GB code at 0x00000000 */
.quad 0x00cff3000000ffff /* 0x7b user 4GB data at 0x00000000 */
.quad 0x00cf9a000000ffff /* 0x60 kernel 4GB code at 0x00000000 */
.quad 0x00cf92000000ffff /* 0x68 kernel 4GB data at 0x00000000 */
.quad 0x00cffa000000ffff /* 0x73 user 4GB code at 0x00000000 */
.quad 0x00cff2000000ffff /* 0x7b user 4GB data at 0x00000000 */
.quad 0x0000000000000000 /* 0x80 TSS descriptor */
.quad 0x0000000000000000 /* 0x88 LDT descriptor */
@@ -143,20 +151,6 @@ ENTRY(cpu_gdt_table)
/* Be sure this is zeroed to avoid false validations in Xen */
.fill PAGE_SIZE_asm / 8 - GDT_ENTRIES,8,0
.org 0x3000
ENTRY(default_ldt)
#define HYPERCALL_PAGE_OFFSET 0x4000
.org HYPERCALL_PAGE_OFFSET
ENTRY(hypercall_page)
.skip 0x1000
/*
* Real beginning of normal "text" segment
*/
ENTRY(stext)
ENTRY(_stext)
/*
* __xen_guest information
@@ -94,9 +94,9 @@ EXPORT_SYMBOL(efi_enabled);
#endif
/* cpu data as detected by the assembly code in head.S */
struct cpuinfo_x86 new_cpu_data __initdata = { 0, 0, 0, 0, -1, 0, 1, 0, -1 };
struct cpuinfo_x86 new_cpu_data __initdata = { 0, 0, 0, 0, -1, 1, 0, 0, -1 };
/* common cpu data for all cpus */
struct cpuinfo_x86 boot_cpu_data __read_mostly = { 0, 0, 0, 0, -1, 0, 1, 0, -1 };
struct cpuinfo_x86 boot_cpu_data __read_mostly = { 0, 0, 0, 0, -1, 1, 0, 0, -1 };
EXPORT_SYMBOL(boot_cpu_data);
unsigned long mmu_cr4_features;
@@ -58,6 +58,9 @@
asmlinkage int system_call(void);
struct desc_struct default_ldt[] = { { 0, 0 }, { 0, 0 }, { 0, 0 },
{ 0, 0 }, { 0, 0 } };
/* Do we ignore FPU interrupts ? */
char ignore_fpu_irq = 0;
@@ -498,20 +501,6 @@ DO_ERROR_INFO(32, SIGSEGV, "iret exception", iret_error, ILL_BADSTK, 0)
fastcall void __kprobes do_general_protection(struct pt_regs * regs,
long error_code)
{
/*
* If we trapped on an LDT access then ensure that the default_ldt is
* loaded, if nothing else. We load default_ldt lazily because LDT
* switching costs time and many applications don't need it.
*/
if (unlikely((error_code & 6) == 4)) {
unsigned long ldt;
__asm__ __volatile__ ("sldt %0" : "=r" (ldt));
if (ldt == 0) {
xen_set_ldt((unsigned long)&default_ldt[0], 5);
return;
}
}
current->thread.error_code = error_code;
current->thread.trap_no = 13;
@@ -1080,13 +1069,6 @@ void __init trap_init(void)
printk("done.\n");
}
/*
* default LDT is a single-entry callgate to lcall7 for iBCS
* and a callgate to lcall27 for Solaris/x86 binaries
*/
make_lowmem_page_readonly(
&default_ldt[0], XENFEAT_writable_descriptor_tables);
/*
* Should be a barrier for any external CPU state.
*/
@@ -25,6 +25,7 @@ void __init machine_specific_modify_cpu_capabilities(struct cpuinfo_x86 *c)
clear_bit(X86_FEATURE_SEP, c->x86_capability);
if (!(xen_start_info->flags & SIF_PRIVILEGED))
clear_bit(X86_FEATURE_MTRR, c->x86_capability);
c->hlt_works_ok = 0;
}
extern void hypervisor_callback(void);
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