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Temporarily revert "amd/msr: allow passthrough of VIRT_SPEC_CTRL for HVM guests"
A person tagged in commit a2eeaa6906
claims the tag is in accurate; revert this commit so that we can
re-commit it again with the tag corrected.
Signed-off-by: George Dunlap <george.dunlap@citrix.com>
This commit is contained in:
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c254f3b45c
commit
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7 files changed
+6
-88
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@@ -541,13 +541,6 @@ static void __init calculate_hvm_max_policy(void)
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raw_cpuid_policy.basic.sep )
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__set_bit(X86_FEATURE_SEP, hvm_featureset);
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/*
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* VIRT_SSBD is exposed in the default policy as a result of
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* VIRT_SC_MSR_HVM being set, it also needs exposing in the max policy.
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*/
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if ( boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM) )
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__set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset);
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/*
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* If Xen isn't virtualising MSR_SPEC_CTRL for HVM guests (functional
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* availability, or admin choice), hide the feature.
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@@ -604,13 +597,6 @@ static void __init calculate_hvm_def_policy(void)
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guest_common_feature_adjustments(hvm_featureset);
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guest_common_default_feature_adjustments(hvm_featureset);
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/*
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* Only expose VIRT_SSBD if AMD_SSBD is not available, and thus
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* VIRT_SC_MSR_HVM is set.
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*/
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if ( boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM) )
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__set_bit(X86_FEATURE_VIRT_SSBD, hvm_featureset);
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sanitise_featureset(hvm_featureset);
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cpuid_featureset_to_policy(hvm_featureset, p);
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recalculate_xstate(p);
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@@ -19,8 +19,6 @@
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.file "svm/entry.S"
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#include <xen/lib.h>
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#include <asm/asm_defns.h>
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#include <asm/page.h>
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@@ -59,9 +57,6 @@ __UNLIKELY_END(nsvm_hap)
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clgi
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ALTERNATIVE "", STR(call vmentry_virt_spec_ctrl), \
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X86_FEATURE_VIRT_SC_MSR_HVM
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/* WARNING! `ret`, `call *`, `jmp *` not safe beyond this point. */
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/* SPEC_CTRL_EXIT_TO_SVM Req: b=curr %rsp=regs/cpuinfo, Clob: acd */
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.macro svm_vmentry_spec_ctrl
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@@ -131,9 +126,6 @@ __UNLIKELY_END(nsvm_hap)
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ALTERNATIVE "", svm_vmexit_spec_ctrl, X86_FEATURE_SC_MSR_HVM
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/* WARNING! `ret`, `call *`, `jmp *` not safe before this point. */
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ALTERNATIVE "", STR(call vmexit_virt_spec_ctrl), \
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X86_FEATURE_VIRT_SC_MSR_HVM
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/*
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* STGI is executed unconditionally, and is sufficiently serialising
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* to safely resolve any Spectre-v1 concerns in the above logic.
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@@ -52,7 +52,6 @@
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#include <asm/hvm/svm/svmdebug.h>
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#include <asm/hvm/svm/nestedsvm.h>
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#include <asm/hvm/nestedhvm.h>
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#include <asm/spec_ctrl.h>
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#include <asm/x86_emulate.h>
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#include <public/sched.h>
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#include <asm/hvm/vpt.h>
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@@ -611,16 +610,6 @@ static void cf_check svm_cpuid_policy_changed(struct vcpu *v)
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svm_intercept_msr(v, MSR_SPEC_CTRL,
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cp->extd.ibrs ? MSR_INTERCEPT_NONE : MSR_INTERCEPT_RW);
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/*
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* Always trap write accesses to VIRT_SPEC_CTRL in order to cache the guest
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* setting and avoid having to perform a rdmsr on vmexit to get the guest
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* setting even if VIRT_SSBD is offered to Xen itself.
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*/
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svm_intercept_msr(v, MSR_VIRT_SPEC_CTRL,
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cp->extd.virt_ssbd && cpu_has_virt_ssbd &&
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!cpu_has_amd_ssbd ?
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MSR_INTERCEPT_WRITE : MSR_INTERCEPT_RW);
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/* Give access to MSR_PRED_CMD if the guest has been told about it. */
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svm_intercept_msr(v, MSR_PRED_CMD,
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cp->extd.ibpb ? MSR_INTERCEPT_NONE : MSR_INTERCEPT_RW);
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@@ -3116,30 +3105,6 @@ void svm_vmexit_handler(struct cpu_user_regs *regs)
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vmcb_set_vintr(vmcb, intr);
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}
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/* Called with GIF=0. */
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void vmexit_virt_spec_ctrl(void)
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{
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unsigned int val = opt_ssbd ? SPEC_CTRL_SSBD : 0;
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if ( val == current->arch.msrs->virt_spec_ctrl.raw )
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return;
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if ( cpu_has_virt_ssbd )
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wrmsr(MSR_VIRT_SPEC_CTRL, val, 0);
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}
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/* Called with GIF=0. */
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void vmentry_virt_spec_ctrl(void)
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{
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unsigned int val = current->arch.msrs->virt_spec_ctrl.raw;
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if ( val == (opt_ssbd ? SPEC_CTRL_SSBD : 0) )
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return;
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if ( cpu_has_virt_ssbd )
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wrmsr(MSR_VIRT_SPEC_CTRL, val, 0);
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}
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/*
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* Local variables:
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* mode: C
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@@ -24,7 +24,7 @@ XEN_CPUFEATURE(APERFMPERF, X86_SYNTH( 8)) /* APERFMPERF */
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XEN_CPUFEATURE(MFENCE_RDTSC, X86_SYNTH( 9)) /* MFENCE synchronizes RDTSC */
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XEN_CPUFEATURE(XEN_SMEP, X86_SYNTH(10)) /* SMEP gets used by Xen itself */
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XEN_CPUFEATURE(XEN_SMAP, X86_SYNTH(11)) /* SMAP gets used by Xen itself */
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XEN_CPUFEATURE(VIRT_SC_MSR_HVM, X86_SYNTH(12)) /* MSR_VIRT_SPEC_CTRL exposed to HVM */
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/* Bit 12 - unused. */
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XEN_CPUFEATURE(IND_THUNK_LFENCE, X86_SYNTH(13)) /* Use IND_THUNK_LFENCE */
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XEN_CPUFEATURE(IND_THUNK_JMP, X86_SYNTH(14)) /* Use IND_THUNK_JMP */
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XEN_CPUFEATURE(SC_NO_BRANCH_HARDEN, X86_SYNTH(15)) /* (Disable) Conditional branch hardening */
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@@ -375,16 +375,6 @@ struct vcpu_msrs
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*/
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uint32_t tsc_aux;
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/*
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* 0xc001011f - MSR_VIRT_SPEC_CTRL (if !X86_FEATURE_AMD_SSBD)
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*
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* AMD only. Guest selected value, context switched on guest VM
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* entry/exit.
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*/
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struct {
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uint32_t raw;
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} virt_spec_ctrl;
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/*
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* 0xc00110{27,19-1b} MSR_AMD64_DR{0-3}_ADDRESS_MASK
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*
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+4
-12
@@ -393,10 +393,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
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if ( !cp->extd.virt_ssbd )
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goto gp_fault;
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if ( cpu_has_amd_ssbd )
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*val = msrs->spec_ctrl.raw & SPEC_CTRL_SSBD;
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else
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*val = msrs->virt_spec_ctrl.raw;
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*val = msrs->spec_ctrl.raw & SPEC_CTRL_SSBD;
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break;
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case MSR_AMD64_DE_CFG:
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@@ -689,15 +686,10 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
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goto gp_fault;
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/* Only supports SSBD bit, the rest are ignored. */
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if ( cpu_has_amd_ssbd )
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{
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if ( val & SPEC_CTRL_SSBD )
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msrs->spec_ctrl.raw |= SPEC_CTRL_SSBD;
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else
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msrs->spec_ctrl.raw &= ~SPEC_CTRL_SSBD;
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}
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if ( val & SPEC_CTRL_SSBD )
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msrs->spec_ctrl.raw |= SPEC_CTRL_SSBD;
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else
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msrs->virt_spec_ctrl.raw = val & SPEC_CTRL_SSBD;
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msrs->spec_ctrl.raw &= ~SPEC_CTRL_SSBD;
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break;
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case MSR_AMD64_DE_CFG:
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@@ -513,12 +513,9 @@ static void __init print_details(enum ind_thunk thunk, uint64_t caps)
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(boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ||
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boot_cpu_has(X86_FEATURE_SC_RSB_HVM) ||
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boot_cpu_has(X86_FEATURE_IBPB_ENTRY_HVM) ||
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boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM) ||
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opt_eager_fpu || opt_md_clear_hvm) ? "" : " None",
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boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ? " MSR_SPEC_CTRL" : "",
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(boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ||
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boot_cpu_has(X86_FEATURE_VIRT_SC_MSR_HVM)) ? " MSR_VIRT_SPEC_CTRL"
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: "",
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boot_cpu_has(X86_FEATURE_SC_MSR_HVM) ? " MSR_VIRT_SPEC_CTRL" : "",
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boot_cpu_has(X86_FEATURE_SC_RSB_HVM) ? " RSB" : "",
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opt_eager_fpu ? " EAGER_FPU" : "",
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opt_md_clear_hvm ? " MD_CLEAR" : "",
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@@ -1243,10 +1240,6 @@ void __init init_speculation_mitigations(void)
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setup_force_cpu_cap(X86_FEATURE_SC_MSR_HVM);
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}
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/* Support VIRT_SPEC_CTRL.SSBD if AMD_SSBD is not available. */
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if ( opt_msr_sc_hvm && !cpu_has_amd_ssbd && cpu_has_virt_ssbd )
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setup_force_cpu_cap(X86_FEATURE_VIRT_SC_MSR_HVM);
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/* Figure out default_xen_spec_ctrl. */
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if ( has_spec_ctrl && ibrs )
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{
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