xen/arm64: bitops: Match the register size with the value size in flsl

Clang is pickier than GCC for the register size in asm statement. It expects
the register size to match the value size.

The instruction clz is expecting the two operands to be the same size
(i.e 32-bit or 64-bit). As the flsl function is dealing with 64-bit
value, we need to make the destination variable 64-bit as well.

While at it, add a newline before the return statement.

Note that the return type of flsl is not updated because the result will
always be smaller than 64 and therefore fit in 32-bit.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Release-acked-by: Juergen Gross <jgross@suse.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
This commit is contained in:
Julien Grall committed 2019-10-03 11:38:23 +01:00
1 parent a943d6ccff
commit bd822333e0
1 file changed
+2 -1
+2 -1
View File
@@ -24,12 +24,13 @@ static /*__*/always_inline unsigned long __ffs(unsigned long word)
static inline int flsl(unsigned long x)
{
int ret;
uint64_t ret;
if (__builtin_constant_p(x))
return generic_flsl(x);
asm("clz\t%0, %1" : "=r" (ret) : "r" (x));
return BITS_PER_LONG - ret;
}
Reference in new issue
Block a user
Blocking a user prevents them from interacting with repositories, such as opening or commenting on pull requests or issues. Learn more about blocking a user.