x86/msr: Rename MSR_INTERRUPT_SSP_TABLE to MSR_ISST

AMD call this whole structure the ISST, which is a better association with IST
than the long form (which becomes ambiguous when abbreviated).

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
This commit is contained in:
Andrew Cooper committed 2025-08-13 13:13:08 +01:00
1 parent 93f4d2da22
commit bd92e2151c
3 files changed
+4 -4

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+1 -1
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@@ -933,7 +933,7 @@ void load_system_tables(void)
wrss(df_ssp, _p(df_ssp));
}
wrmsrl(MSR_INTERRUPT_SSP_TABLE, (unsigned long)ist_ssp);
wrmsrl(MSR_ISST, (unsigned long)ist_ssp);
}
BUILD_BUG_ON(sizeof(*tss) <= 0x67); /* Mandated by the architecture. */
+1 -1
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@@ -157,7 +157,7 @@
#define MSR_PL1_SSP 0x000006a5
#define MSR_PL2_SSP 0x000006a6
#define MSR_PL3_SSP 0x000006a7
#define MSR_INTERRUPT_SSP_TABLE 0x000006a8
#define MSR_ISST 0x000006a8
#define MSR_PKRS 0x000006e1
+2 -2
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@@ -138,7 +138,7 @@ int guest_rdmsr(struct vcpu *v, uint32_t msr, uint64_t *val)
case MSR_RTIT_OUTPUT_BASE ... MSR_RTIT_ADDR_B(7):
case MSR_U_CET:
case MSR_S_CET:
case MSR_PL0_SSP ... MSR_INTERRUPT_SSP_TABLE:
case MSR_PL0_SSP ... MSR_ISST:
case MSR_AMD64_LWP_CFG:
case MSR_AMD64_LWP_CBADDR:
case MSR_PPIN_CTL:
@@ -442,7 +442,7 @@ int guest_wrmsr(struct vcpu *v, uint32_t msr, uint64_t val)
case MSR_RTIT_OUTPUT_BASE ... MSR_RTIT_ADDR_B(7):
case MSR_U_CET:
case MSR_S_CET:
case MSR_PL0_SSP ... MSR_INTERRUPT_SSP_TABLE:
case MSR_PL0_SSP ... MSR_ISST:
case MSR_AMD64_LWP_CFG:
case MSR_AMD64_LWP_CBADDR:
case MSR_PPIN_CTL:
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