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[IA64] Clean up warnings related to VTi code. (header files)
This patch adds some functions' prototype declaration in corresponding header file and removes issues suce as redefinition of some macros. Signed-off-by: Zhang Xiantao <xiantao.zhang@intel.com>
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awilliam@xenbuild.aw committed
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5 files changed
+26
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@@ -34,7 +34,24 @@ extern void vmx_load_state(struct vcpu *v);
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extern void vmx_setup_platform(struct domain *d, struct vcpu_guest_context *c);
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extern void vmx_wait_io(void);
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extern void vmx_io_assist(struct vcpu *v);
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extern void vmx_load_all_rr(struct vcpu *vcpu);
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extern void panic_domain(struct pt_regs *regs, const char *fmt, ...);
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extern int ia64_hypercall (struct pt_regs *regs);
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extern void vmx_save_state(struct vcpu *v);
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extern void vmx_load_state(struct vcpu *v);
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extern void show_registers(struct pt_regs *regs);
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extern int vmx_alloc_contig_pages(struct domain *d);
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extern unsigned long __gpfn_to_mfn_foreign(struct domain *d, unsigned long gpfn);
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extern void sync_split_caches(void);
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extern void vmx_virq_line_assist(struct vcpu *v);
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extern void set_privileged_operation_isr (struct vcpu *vcpu,int inst);
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extern void privilege_op (struct vcpu *vcpu);
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extern void set_ifa_itir_iha (struct vcpu *vcpu, u64 vadr,
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int set_ifa, int set_itir, int set_iha);
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extern void inject_guest_interruption(struct vcpu *vcpu, u64 vec);
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extern void vmx_intr_assist(struct vcpu *v);
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extern void set_illegal_op_isr (struct vcpu *vcpu);
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extern void illegal_op (struct vcpu *vcpu);
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static inline vcpu_iodata_t *get_vio(struct domain *d, unsigned long cpu)
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{
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return &((shared_iopage_t *)d->arch.vmx_platform.shared_page_va)->vcpu_iodata[cpu];
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@@ -27,8 +27,6 @@
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//#define VHPT_SIZE (1 << VHPT_SIZE_PS)
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#define ARCH_PAGE_SHIFT 12
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#define ARCH_PAGE_SIZE PSIZE(ARCH_PAGE_SHIFT)
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#define INVALID_MFN (-1)
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#define MAX_PHYS_ADDR_BITS 50
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#define PMASK(size) (~((size) - 1))
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#define PSIZE(size) (1UL<<(size))
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@@ -87,9 +85,6 @@
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#define STLB_TC 0
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#define STLB_TR 1
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#define VMM_RR_MASK 0xfffff
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#define VMM_RR_SHIFT 20
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#define IA64_RR_SHIFT 61
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#define PHYS_PAGE_SHIFT PPN_SHIFT
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@@ -109,7 +104,6 @@
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#define VRN_MASK 0xe000000000000000L
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#define PTA_BASE_MASK 0x3fffffffffffL
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#define PTA_BASE_SHIFT 15
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#define VHPT_OFFSET_MASK 0x7fff
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#define BITS_SHIFT_256MB 28
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@@ -145,6 +139,7 @@ bits_v(uint64_t v, uint32_t bs, uint32_t be)
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uint64_t result;
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__asm __volatile("shl %0=%1, %2;; shr.u %0=%0, %3;;"
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: "=r" (result): "r"(v), "r"(63-be), "r" (bs+63-be) );
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return result;
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}
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#define bits(val, bs, be) \
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@@ -114,7 +114,7 @@ ia64_pal_vp_save (u64 *vpd, u64 pal_proc_vector)
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PAL_CALL_STK(iprv, PAL_VP_SAVE, (u64)vpd, pal_proc_vector, 0);
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return iprv.status;
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}
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extern void pal_emul(struct vcpu *vcpu);
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#define PAL_PROC_VM_BIT (1UL << 40)
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#define PAL_PROC_VMSW_BIT (1UL << 54)
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#endif /* _ASM_IA64_VT_PAL_H */
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@@ -96,6 +96,8 @@ extern void prepare_if_physical_mode(VCPU *vcpu);
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extern void recover_if_physical_mode(VCPU *vcpu);
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extern void vmx_init_all_rr(VCPU *vcpu);
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extern void vmx_load_all_rr(VCPU *vcpu);
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extern void physical_itlb_miss(VCPU *vcpu, u64 vadr);
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extern void physical_dtlb_miss(VCPU *vcpu, u64 vadr);
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/*
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* No sanity check here, since all psr changes have been
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* checked in switch_mm_mode().
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@@ -51,8 +51,7 @@
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#define VMM_RR_SHIFT 20
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#define VMM_RR_MASK ((1UL<<VMM_RR_SHIFT)-1)
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//#define VRID_2_MRID(vcpu,rid) ((rid) & VMM_RR_MASK) | \
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((vcpu->domain->domain_id) << VMM_RR_SHIFT)
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extern u64 indirect_reg_igfld_MASK ( int type, int index, u64 value);
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extern u64 cr_igfld_mask (int index, u64 value);
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extern int check_indirect_reg_rsv_fields ( int type, int index, u64 value );
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@@ -118,8 +117,9 @@ extern void memread_p(VCPU *vcpu, u64 *src, u64 *dest, size_t s);
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extern void memread_v(VCPU *vcpu, thash_data_t *vtlb, u64 *src, u64 *dest, size_t s);
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extern void memwrite_v(VCPU *vcpu, thash_data_t *vtlb, u64 *src, u64 *dest, size_t s);
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extern void memwrite_p(VCPU *vcpu, u64 *src, u64 *dest, size_t s);
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extern void vcpu_load_kernel_regs(VCPU *vcpu);
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extern IA64FAULT vmx_vcpu_increment_iip(VCPU *vcpu);
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extern void vmx_switch_rr7(unsigned long ,shared_info_t*,void *,void *,void *);
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/**************************************************************************
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VCPU control register access routines
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**************************************************************************/
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@@ -461,7 +461,6 @@ static inline unsigned long
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vmx_vrrtomrr(VCPU *v, unsigned long val)
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{
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ia64_rr rr;
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u64 rid;
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rr.rrval=val;
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rr.rid = rr.rid + v->arch.starting_rid;
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