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x86/emulate: Remove HAVE_AS_SSE4_2
The new toolchain baseline knows the CRC32 instructions; no need to carry the workaround in the code. Resolves: https://gitlab.com/xen-project/xen/-/work_items/206 Signed-off-by: Denis Mukhin <dmukhin@ford.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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@@ -10,7 +10,6 @@ CFLAGS += -msoft-float
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$(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS))
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$(call cc-option-add,CFLAGS,CC,-Wnested-externs)
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$(call as-option-add,CFLAGS,CC,"crc32 %eax$(comma)%eax",-DHAVE_AS_SSE4_2)
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$(call as-option-add,CFLAGS,CC,"rdrand %eax",-DHAVE_AS_RDRAND)
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$(call as-option-add,CFLAGS,CC,"xsaveopt (%rax)",-DHAVE_AS_XSAVEOPT)
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$(call as-option-add,CFLAGS,CC,"rdseed %eax",-DHAVE_AS_RDSEED)
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@@ -6882,7 +6882,7 @@ x86_emulate(
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goto unhandleable;
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}
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break;
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#ifdef HAVE_AS_SSE4_2
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case X86EMUL_OPC_F2(0x0f38, 0xf0): /* crc32 r/m8, r{32,64} */
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case X86EMUL_OPC_F2(0x0f38, 0xf1): /* crc32 r/m{16,32,64}, r{32,64} */
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host_and_vcpu_must_have(sse4_2);
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@@ -6901,17 +6901,16 @@ x86_emulate(
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asm ( "crc32l %1,%k0" : "+r" (dst.val)
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: "rm" (*(uint32_t *)&src.val) );
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break;
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# ifdef __x86_64__
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#ifdef __x86_64__
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case 8:
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asm ( "crc32q %1,%0" : "+r" (dst.val) : "rm" (src.val) );
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break;
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# endif
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#endif
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default:
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ASSERT_UNREACHABLE();
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goto unhandleable;
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}
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break;
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#endif
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case X86EMUL_OPC_VEX(0x0f38, 0xf2): /* andn r/m,r,r */
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case X86EMUL_OPC_VEX(0x0f38, 0xf5): /* bzhi r,r/m,r */
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