x86/spec-ctrl: Make svm_vmexit_spec_ctrl conditional

The logic was written this way out of an abundance of caution, but the reality
is that AMD parts don't currently have the RAS-flushing side effect, nor do
they intend to gain it.

This removes one WRMSR from the VMExit path by default on Zen2 systems.

Fixes: 614cec7d79 ("x86/svm: VMEntry/Exit logic for MSR_SPEC_CTRL")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
This commit is contained in:
Andrew Cooper committed 2022-07-19 14:28:18 +01:00
1 parent addb336f4a
commit c16a9eda77
1 file changed
+5 -5
+5 -5
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@@ -113,15 +113,15 @@ __UNLIKELY_END(nsvm_hap)
ALTERNATIVE "", DO_OVERWRITE_RSB, X86_FEATURE_SC_RSB_HVM
.macro svm_vmexit_spec_ctrl
/*
* Write to MSR_SPEC_CTRL unconditionally, for the RAS[:32]
* flushing side effect.
*/
mov $MSR_SPEC_CTRL, %ecx
movzbl CPUINFO_xen_spec_ctrl(%rsp), %eax
movzbl CPUINFO_last_spec_ctrl(%rsp), %edx
cmp %edx, %eax
je 1f /* Skip write if value is correct. */
mov $MSR_SPEC_CTRL, %ecx
xor %edx, %edx
wrmsr
mov %al, CPUINFO_last_spec_ctrl(%rsp)
1:
.endm
ALTERNATIVE "", svm_vmexit_spec_ctrl, X86_FEATURE_SC_MSR_HVM
/* WARNING! `ret`, `call *`, `jmp *` not safe before this point. */
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