Revert "xen/riscv: drop CONFIG_RISCV_ISA_RV64G"

This reverts commit 86b1b8ec3d. It
fails in CI without an adjustment there.

xen/arch/riscv/Kconfig

@@ -23,6 +23,24 @@ endmenu
 
 menu "ISA Selection"
 
+choice
+	prompt "Base ISA"
+	default RISCV_ISA_RV64G if RISCV_64
+	help
+	  This selects the base ISA extensions that Xen will target.
+
+config RISCV_ISA_RV64G
+	bool "RV64G"
+	help
+	  Use the RV64I base ISA, plus
+	  "M" for multiply/divide,
+	  "A" for atomic instructions,
+	  “F”/"D" for  {single/double}-precision floating-point instructions,
+	  "Zicsr" for control and status register access,
+	  "Zifencei" for instruction-fetch fence.
+
+endchoice
+
 config RISCV_ISA_C
 	bool "Compressed extension"
 	default y

xen/arch/riscv/arch.mk

@@ -6,12 +6,10 @@ $(call cc-options-add,CFLAGS,CC,$(EMBEDDED_EXTRA_CFLAGS))
 riscv-abi-$(CONFIG_RISCV_32) := -mabi=ilp32
 riscv-abi-$(CONFIG_RISCV_64) := -mabi=lp64
 
-riscv-march-$(CONFIG_RISCV_64) := rv64
-riscv-march-y += ima
-riscv-march-$(CONFIG_RISCV_ISA_C) += c
-riscv-march-y += _zicsr_zifencei
+riscv-march-$(CONFIG_RISCV_ISA_RV64G) := rv64g
+riscv-march-$(CONFIG_RISCV_ISA_C)       := $(riscv-march-y)c
 
-riscv-generic-flags := $(riscv-abi-y) -march=$(subst $(space),,$(riscv-march-y))
+riscv-generic-flags := $(riscv-abi-y) -march=$(riscv-march-y)
 
 # check-extension: Check whether extenstion is supported by a compiler and
 #                  an assembler.