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x86/thunk: (Mis)align the RETs in clear_bhb_loops() to mitigate ITS
The Indirect Target Selection speculative vulnerability means that indirect
branches (including RETs) are unsafe when in the first half of a cacheline.
clear_bhb_loops() has a precise layout of branches. The alignment for
performance cause the RETs to always be in an unsafe position, and converting
those to return thunks changes the branching pattern. While such a conversion
is believed to be safe, clear_bhb_loops() is also a performance-relevant
fastpath, so (mis)align the RETs to be in a safe position.
No functional change.
This is part of XSA-469 / CVE-2024-28956
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
(cherry picked from commit c0db07031a)
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1 file changed
+12
-5
@@ -50,7 +50,12 @@ END(clear_bhb_tsx)
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* ret
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*
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* The CALL/RETs are necessary to prevent the Loop Stream Detector from
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* interfering. The alignment is for performance and not safety.
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* interfering.
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*
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* The .balign's are for performance, but they cause the RETs to be in unsafe
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* positions with respect to Indirect Target Selection. The .skips are to
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* move the RETs into ITS-safe positions, rather than using the slowpath
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* through __x86_return_thunk.
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*
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* The "short" sequence (5 and 5) is for CPUs prior to Alder Lake / Sapphire
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* Rapids (i.e. Cores prior to Golden Cove and/or Gracemont).
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@@ -66,12 +71,14 @@ FUNC(clear_bhb_loops)
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jmp 5f
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int3
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.align 64
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.balign 64
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.skip 32 - (.Lr1 - 1f), 0xcc
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1: call 2f
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ret
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.Lr1: ret
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int3
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.align 64
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.balign 64
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.skip 32 - 18 /* (.Lr2 - 2f) but Clang IAS doesn't like this */, 0xcc
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2: ALTERNATIVE "mov $5, %eax", "mov $7, %eax", X86_SPEC_BHB_LOOPS_LONG
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3: jmp 4f
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@@ -83,7 +90,7 @@ FUNC(clear_bhb_loops)
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sub $1, %ecx
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jnz 1b
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ret
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.Lr2: ret
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5:
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/*
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* The Intel sequence has an LFENCE here. The purpose is to ensure
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