Revert "x86/MSI-X: use qword MMIO access for address writes"

This reverts commit 73cb5d43a8,
which appears to break with certain Tigon3 NICs.

xen/arch/x86/msi.c

@@ -198,7 +198,8 @@ static void read_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
         void __iomem *base;
         base = entry->mask_base;
 
-        msg->address = readq(base + PCI_MSIX_ENTRY_ADDRESS_OFFSET);
+        msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
+        msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
         msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET);
         break;
     }
@@ -259,7 +260,10 @@ static int write_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
         void __iomem *base;
         base = entry->mask_base;
 
-        writeq(msg->address, base + PCI_MSIX_ENTRY_ADDRESS_OFFSET);
+        writel(msg->address_lo,
+               base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET);
+        writel(msg->address_hi,
+               base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET);
         writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET);
         break;
     }

xen/include/asm-x86/msi.h

@@ -65,13 +65,8 @@ struct msi_info {
 };
 
 struct msi_msg {
-	union {
-		u64	address; /* message address */
-		struct {
-			u32	address_lo; /* message address low 32 bits */
-			u32	address_hi; /* message address high 32 bits */
-		};
-	};
+	u32	address_lo;	/* low 32 bits of msi message address */
+	u32	address_hi;	/* high 32 bits of msi message address */
 	u32	data;		/* 16 bits of msi message data */
 	u32	dest32;		/* used when Interrupt Remapping with EIM is enabled */
 };

xen/include/xen/pci_regs.h

@@ -307,7 +307,6 @@
 #define  PCI_MSIX_BIRMASK	(7 << 0)
 
 #define PCI_MSIX_ENTRY_SIZE			16
-#define  PCI_MSIX_ENTRY_ADDRESS_OFFSET		0
 #define  PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET	0
 #define  PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET	4
 #define  PCI_MSIX_ENTRY_DATA_OFFSET		8