xen/arm: vpsci: Rework the logic to start AArch32 vCPU in Thumb mode

32-bit domain is able to select the instruction (ARM vs Thumb) to use
when boot a new vCPU via CPU_ON. This is indicated via bit[0] of the
entry point address (see "T32 support" in PSCI v1.1 DEN0022D). bit[0]
must be cleared when setting the PC.

At the moment, Xen is setting the CPSR.T but never clear bit[0]. Clear
it to match the specification.

At the same time, slighlty rework the code to make clear thumb is only for
32-bit domain. Lastly, take the opportunity to switch is_thumb from int
to bool.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>

xen/arch/arm/vpsci.c

@@ -28,7 +28,7 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
     struct domain *d = current->domain;
     struct vcpu_guest_context *ctxt;
     int rc;
-    int is_thumb = entry_point & 1;
+    bool is_thumb = entry_point & 1;
     register_t vcpuid;
 
     vcpuid = vaffinity_to_vcpuid(target_cpu);
@@ -62,6 +62,13 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
     if ( is_32bit_domain(d) )
     {
         ctxt->user_regs.cpsr = PSR_GUEST32_INIT;
+        /* Start the VCPU with THUMB set if it's requested by the kernel */
+        if ( is_thumb )
+        {
+            ctxt->user_regs.cpsr |= PSR_THUMB;
+            ctxt->user_regs.pc64 &= ~(u64)1;
+        }
+
         ctxt->user_regs.r0_usr = context_id;
     }
 #ifdef CONFIG_ARM_64
@@ -71,10 +78,6 @@ static int do_common_cpu_on(register_t target_cpu, register_t entry_point,
         ctxt->user_regs.x0 = context_id;
     }
 #endif
-
-    /* Start the VCPU with THUMB set if it's requested by the kernel */
-    if ( is_thumb )
-        ctxt->user_regs.cpsr |= PSR_THUMB;
     ctxt->flags = VGCF_online;
 
     domain_lock(d);