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x86emul: support AVX512F move high/low insns
No explicit test harness additions other than the overrides, as the compiler already makes use of the insns. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
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Jan Beulich committed
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commit
cda748bc32
3 files changed
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@@ -253,6 +253,16 @@ static const struct test avx512f_128[] = {
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INSN(insertps, 66, 0f3a, 21, el, d, el),
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INSN(mov, 66, 0f, 6e, el, dq64, el),
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INSN(mov, 66, 0f, 7e, el, dq64, el),
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// movhlps, , 0f, 12, d
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INSN(movhpd, 66, 0f, 16, el, q, vl),
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INSN(movhpd, 66, 0f, 17, el, q, vl),
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INSN(movhps, , 0f, 16, el_2, d, vl),
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INSN(movhps, , 0f, 17, el_2, d, vl),
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// movlhps, , 0f, 16, d
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INSN(movlpd, 66, 0f, 12, el, q, vl),
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INSN(movlpd, 66, 0f, 13, el, q, vl),
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INSN(movlps, , 0f, 12, el_2, d, vl),
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INSN(movlps, , 0f, 13, el_2, d, vl),
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INSN(movq, f3, 0f, 7e, el, q, el),
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INSN(movq, 66, 0f, d6, el, q, el),
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};
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@@ -266,6 +266,12 @@ OVR(movd);
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OVR(movq);
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OVR_SFP(mov);
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OVR_VFP(mova);
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OVR(movhlps);
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OVR(movhpd);
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OVR(movhps);
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OVR(movlhps);
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OVR(movlpd);
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OVR(movlps);
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OVR_VFP(movnt);
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OVR_VFP(movu);
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OVR_FP(mul);
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@@ -286,11 +286,11 @@ static const struct twobyte_table {
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[0x0f] = { ModRM|SrcImmByte },
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[0x10] = { DstImplicit|SrcMem|ModRM|Mov, simd_any_fp, d8s_vl },
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[0x11] = { DstMem|SrcImplicit|ModRM|Mov, simd_any_fp, d8s_vl },
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[0x12] = { DstImplicit|SrcMem|ModRM|Mov, simd_other },
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[0x13] = { DstMem|SrcImplicit|ModRM|Mov, simd_other },
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[0x12] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, 3 },
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[0x13] = { DstMem|SrcImplicit|ModRM|Mov, simd_other, 3 },
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[0x14 ... 0x15] = { DstImplicit|SrcMem|ModRM, simd_packed_fp, d8s_vl },
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[0x16] = { DstImplicit|SrcMem|ModRM|Mov, simd_other },
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[0x17] = { DstMem|SrcImplicit|ModRM|Mov, simd_other },
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[0x16] = { DstImplicit|SrcMem|ModRM|Mov, simd_other, 3 },
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[0x17] = { DstMem|SrcImplicit|ModRM|Mov, simd_other, 3 },
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[0x18 ... 0x1f] = { ImplicitOps|ModRM },
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[0x20 ... 0x21] = { DstMem|SrcImplicit|ModRM },
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[0x22 ... 0x23] = { DstImplicit|SrcMem|ModRM },
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@@ -6006,6 +6006,25 @@ x86_emulate(
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op_bytes = 8;
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goto simd_0f_fp;
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case X86EMUL_OPC_EVEX_66(0x0f, 0x12): /* vmovlpd m64,xmm,xmm */
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CASE_SIMD_PACKED_FP(_EVEX, 0x0f, 0x13): /* vmovlp{s,d} xmm,m64 */
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case X86EMUL_OPC_EVEX_66(0x0f, 0x16): /* vmovhpd m64,xmm,xmm */
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CASE_SIMD_PACKED_FP(_EVEX, 0x0f, 0x17): /* vmovhp{s,d} xmm,m64 */
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generate_exception_if(ea.type != OP_MEM, EXC_UD);
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/* fall through */
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case X86EMUL_OPC_EVEX(0x0f, 0x12): /* vmovlps m64,xmm,xmm */
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/* vmovhlps xmm,xmm,xmm */
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case X86EMUL_OPC_EVEX(0x0f, 0x16): /* vmovhps m64,xmm,xmm */
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/* vmovlhps xmm,xmm,xmm */
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generate_exception_if((evex.lr || evex.opmsk || evex.brs ||
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evex.w != (evex.pfx & VEX_PREFIX_DOUBLE_MASK)),
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EXC_UD);
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host_and_vcpu_must_have(avx512f);
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if ( (d & DstMask) != DstMem )
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d &= ~TwoOp;
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op_bytes = 8;
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goto simd_zmm;
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case X86EMUL_OPC_F3(0x0f, 0x12): /* movsldup xmm/m128,xmm */
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case X86EMUL_OPC_VEX_F3(0x0f, 0x12): /* vmovsldup {x,y}mm/mem,{x,y}mm */
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case X86EMUL_OPC_F2(0x0f, 0x12): /* movddup xmm/m64,xmm */
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