x86/ioapic: add a raw field to RTE struct

Further changes will require access to the full RTE as a single value
in order to pass it to IOMMU interrupt remapping handlers.

No functional change intended.

Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
This commit is contained in:
Roger Pau Monné authored and Jan Beulich committed 2023-07-28 09:39:44 +02:00
1 parent 15d327e3d6
commit cdc48cb5a7
4 files changed
+33 -30

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+28 -25
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@@ -90,35 +90,38 @@ enum ioapic_irq_destination_types {
};
struct IO_APIC_route_entry {
unsigned int vector:8;
unsigned int delivery_mode:3; /*
* 000: FIXED
* 001: lowest prio
* 111: ExtINT
*/
unsigned int dest_mode:1; /* 0: physical, 1: logical */
unsigned int delivery_status:1;
unsigned int polarity:1; /* 0: low, 1: high */
unsigned int irr:1;
unsigned int trigger:1; /* 0: edge, 1: level */
unsigned int mask:1; /* 0: enabled, 1: disabled */
unsigned int __reserved_2:15;
union {
struct {
unsigned int __reserved_1:24;
unsigned int physical_dest:4;
unsigned int __reserved_2:4;
} physical;
unsigned int vector:8;
unsigned int delivery_mode:3; /*
* 000: FIXED
* 001: lowest prio
* 111: ExtINT
*/
unsigned int dest_mode:1; /* 0: physical, 1: logical */
unsigned int delivery_status:1;
unsigned int polarity:1; /* 0: low, 1: high */
unsigned int irr:1;
unsigned int trigger:1; /* 0: edge, 1: level */
unsigned int mask:1; /* 0: enabled, 1: disabled */
unsigned int __reserved_2:15;
struct {
unsigned int __reserved_1:24;
unsigned int logical_dest:8;
} logical;
union {
struct {
unsigned int __reserved_1:24;
unsigned int physical_dest:4;
unsigned int __reserved_2:4;
} physical;
/* used when Interrupt Remapping with EIM is enabled */
unsigned int dest32;
} dest;
struct {
unsigned int __reserved_1:24;
unsigned int logical_dest:8;
} logical;
unsigned int dest32;
} dest;
};
uint64_t raw;
};
};
/*
+1 -1
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@@ -2360,7 +2360,7 @@ int ioapic_guest_read(unsigned long physbase, unsigned int reg, u32 *pval)
int ioapic_guest_write(unsigned long physbase, unsigned int reg, u32 val)
{
int apic, pin, irq, ret, pirq;
struct IO_APIC_route_entry rte = { 0 };
struct IO_APIC_route_entry rte = { };
unsigned long flags;
struct irq_desc *desc;
+2 -2
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@@ -352,8 +352,8 @@ static int update_intremap_entry_from_ioapic(
void cf_check amd_iommu_ioapic_update_ire(
unsigned int apic, unsigned int reg, unsigned int value)
{
struct IO_APIC_route_entry old_rte = { 0 };
struct IO_APIC_route_entry new_rte = { 0 };
struct IO_APIC_route_entry old_rte = { };
struct IO_APIC_route_entry new_rte = { };
unsigned int rte_lo = (reg & 1) ? reg - 1 : reg;
unsigned int pin = (reg - 0x10) / 2;
int seg, bdf, rc;
+2 -2
View File
@@ -419,7 +419,7 @@ unsigned int cf_check io_apic_read_remap_rte(
{
unsigned int ioapic_pin = (reg - 0x10) / 2;
int index;
struct IO_xAPIC_route_entry old_rte = { 0 };
struct IO_xAPIC_route_entry old_rte = { };
int rte_upper = (reg & 1) ? 1 : 0;
struct vtd_iommu *iommu = ioapic_to_iommu(IO_APIC_ID(apic));
@@ -442,7 +442,7 @@ void cf_check io_apic_write_remap_rte(
unsigned int apic, unsigned int reg, unsigned int value)
{
unsigned int ioapic_pin = (reg - 0x10) / 2;
struct IO_xAPIC_route_entry old_rte = { 0 };
struct IO_xAPIC_route_entry old_rte = { };
struct IO_APIC_route_remap_entry *remap_rte;
unsigned int rte_upper = (reg & 1) ? 1 : 0;
struct vtd_iommu *iommu = ioapic_to_iommu(IO_APIC_ID(apic));
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