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IOMMU: make page table deallocation preemptible
This too can take an arbitrary amount of time. In fact, the bulk of the work is being moved to a tasklet, as handling the necessary preemption logic in line seems close to impossible given that the teardown may also be invoked on error paths. Signed-off-by: Jan Beulich <jbeulich@suse.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com> Acked-by: Xiantao Zhang <xiantao.zhang@intel.com>
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@@ -405,11 +405,21 @@ static int amd_iommu_assign_device(struct domain *d, u8 devfn,
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return reassign_device(dom0, d, devfn, pdev);
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}
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static void deallocate_next_page_table(struct page_info* pg, int level)
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static void deallocate_next_page_table(struct page_info *pg, int level)
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{
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PFN_ORDER(pg) = level;
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spin_lock(&iommu_pt_cleanup_lock);
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page_list_add_tail(pg, &iommu_pt_cleanup_list);
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spin_unlock(&iommu_pt_cleanup_lock);
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}
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static void deallocate_page_table(struct page_info *pg)
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{
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void *table_vaddr, *pde;
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u64 next_table_maddr;
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int index, next_level;
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unsigned int index, level = PFN_ORDER(pg), next_level;
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PFN_ORDER(pg) = 0;
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if ( level <= 1 )
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{
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@@ -599,6 +609,7 @@ const struct iommu_ops amd_iommu_ops = {
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.teardown = amd_iommu_domain_destroy,
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.map_page = amd_iommu_map_page,
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.unmap_page = amd_iommu_unmap_page,
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.free_page_table = deallocate_page_table,
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.reassign_device = reassign_device,
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.get_device_group_id = amd_iommu_group_id,
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.update_ire_from_apic = amd_iommu_ioapic_update_ire,
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@@ -58,6 +58,10 @@ bool_t __read_mostly amd_iommu_perdev_intremap = 1;
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DEFINE_PER_CPU(bool_t, iommu_dont_flush_iotlb);
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DEFINE_SPINLOCK(iommu_pt_cleanup_lock);
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PAGE_LIST_HEAD(iommu_pt_cleanup_list);
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static struct tasklet iommu_pt_cleanup_tasklet;
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static struct keyhandler iommu_p2m_table = {
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.diagnostic = 0,
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.u.fn = iommu_dump_p2m_table,
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@@ -251,6 +255,15 @@ int iommu_remove_device(struct pci_dev *pdev)
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return hd->platform_ops->remove_device(pdev->devfn, pdev);
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}
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static void iommu_teardown(struct domain *d)
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{
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const struct hvm_iommu *hd = domain_hvm_iommu(d);
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d->need_iommu = 0;
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hd->platform_ops->teardown(d);
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tasklet_schedule(&iommu_pt_cleanup_tasklet);
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}
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/*
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* If the device isn't owned by dom0, it means it already
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* has been assigned to other domain, or it doesn't exist.
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@@ -325,10 +338,7 @@ static int assign_device(struct domain *d, u16 seg, u8 bus, u8 devfn)
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done:
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if ( !has_arch_pdevs(d) && need_iommu(d) )
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{
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d->need_iommu = 0;
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hd->platform_ops->teardown(d);
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}
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iommu_teardown(d);
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spin_unlock(&pcidevs_lock);
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return rc;
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@@ -393,10 +403,7 @@ static int iommu_populate_page_table(struct domain *d)
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if ( !rc )
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iommu_iotlb_flush_all(d);
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else if ( rc != -ERESTART )
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{
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d->need_iommu = 0;
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hd->platform_ops->teardown(d);
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}
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iommu_teardown(d);
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return rc;
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}
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@@ -413,10 +420,7 @@ void iommu_domain_destroy(struct domain *d)
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return;
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if ( need_iommu(d) )
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{
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d->need_iommu = 0;
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hd->platform_ops->teardown(d);
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}
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iommu_teardown(d);
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list_for_each_safe ( ioport_list, tmp, &hd->g2m_ioport_list )
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{
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@@ -454,6 +458,23 @@ int iommu_unmap_page(struct domain *d, unsigned long gfn)
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return hd->platform_ops->unmap_page(d, gfn);
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}
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static void iommu_free_pagetables(unsigned long unused)
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{
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do {
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struct page_info *pg;
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spin_lock(&iommu_pt_cleanup_lock);
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pg = page_list_remove_head(&iommu_pt_cleanup_list);
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spin_unlock(&iommu_pt_cleanup_lock);
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if ( !pg )
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return;
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iommu_get_ops()->free_page_table(pg);
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} while ( !softirq_pending(smp_processor_id()) );
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tasklet_schedule_on_cpu(&iommu_pt_cleanup_tasklet,
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cpumask_cycle(smp_processor_id(), &cpu_online_map));
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}
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void iommu_iotlb_flush(struct domain *d, unsigned long gfn, unsigned int page_count)
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{
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struct hvm_iommu *hd = domain_hvm_iommu(d);
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@@ -516,10 +537,7 @@ int deassign_device(struct domain *d, u16 seg, u8 bus, u8 devfn)
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pdev->fault.count = 0;
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if ( !has_arch_pdevs(d) && need_iommu(d) )
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{
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d->need_iommu = 0;
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hd->platform_ops->teardown(d);
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}
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iommu_teardown(d);
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return ret;
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}
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@@ -558,6 +576,7 @@ int __init iommu_setup(void)
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iommu_passthrough ? "Passthrough" :
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iommu_dom0_strict ? "Strict" : "Relaxed");
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printk("Interrupt remapping %sabled\n", iommu_intremap ? "en" : "dis");
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tasklet_init(&iommu_pt_cleanup_tasklet, iommu_free_pagetables, 0);
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}
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return rc;
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@@ -668,13 +668,24 @@ static void dma_pte_clear_one(struct domain *domain, u64 addr)
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static void iommu_free_pagetable(u64 pt_maddr, int level)
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{
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int i;
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struct dma_pte *pt_vaddr, *pte;
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int next_level = level - 1;
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struct page_info *pg = maddr_to_page(pt_maddr);
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if ( pt_maddr == 0 )
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return;
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PFN_ORDER(pg) = level;
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spin_lock(&iommu_pt_cleanup_lock);
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page_list_add_tail(pg, &iommu_pt_cleanup_list);
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spin_unlock(&iommu_pt_cleanup_lock);
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}
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static void iommu_free_page_table(struct page_info *pg)
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{
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unsigned int i, next_level = PFN_ORDER(pg) - 1;
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u64 pt_maddr = page_to_maddr(pg);
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struct dma_pte *pt_vaddr, *pte;
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PFN_ORDER(pg) = 0;
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pt_vaddr = (struct dma_pte *)map_vtd_domain_page(pt_maddr);
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for ( i = 0; i < PTE_NUM; i++ )
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@@ -2430,6 +2441,7 @@ const struct iommu_ops intel_iommu_ops = {
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.teardown = iommu_domain_teardown,
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.map_page = intel_iommu_map_page,
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.unmap_page = intel_iommu_unmap_page,
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.free_page_table = iommu_free_page_table,
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.reassign_device = reassign_device_ownership,
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.get_device_group_id = intel_iommu_group_id,
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.update_ire_from_apic = io_apic_write_remap_rte,
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@@ -88,6 +88,7 @@ bool_t pt_irq_need_timer(uint32_t flags);
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struct msi_desc;
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struct msi_msg;
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struct page_info;
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struct iommu_ops {
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int (*init)(struct domain *d);
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@@ -100,6 +101,7 @@ struct iommu_ops {
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int (*map_page)(struct domain *d, unsigned long gfn, unsigned long mfn,
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unsigned int flags);
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int (*unmap_page)(struct domain *d, unsigned long gfn);
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void (*free_page_table)(struct page_info *);
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int (*reassign_device)(struct domain *s, struct domain *t,
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u8 devfn, struct pci_dev *);
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int (*get_device_group_id)(u16 seg, u8 bus, u8 devfn);
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@@ -151,4 +153,7 @@ int adjust_vtd_irq_affinities(void);
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*/
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DECLARE_PER_CPU(bool_t, iommu_dont_flush_iotlb);
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extern struct spinlock iommu_pt_cleanup_lock;
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extern struct page_list_head iommu_pt_cleanup_list;
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#endif /* _IOMMU_H_ */
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