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x86emul: V{,P}{COMPRESS,EXPAND}* can (wrongly) trigger assertion
AFL has pointed out that the op_bytes-is-not-0 assertion in common SIMD
handling can trigger for these insns. Indeed when the (relevant part of)
the controlling mask register is 0, no memory is accessed at all. Leave
op_bytes unaltered in this case, to engage the short-circuiting in common
SIMD handling when fault_suppression is true and op_bytes is 0.
While there also correct a related typo in the test harness.
Fixes: 65f82d4ce1 ("x86emul: support AVX512{F,_VBMI2} compress/expand insns")
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
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@@ -1946,7 +1946,7 @@ static const struct evex {
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{ { 0x83 }, 2, T, R, pfx_66, W1, Ln }, /* vpmultishiftqb */
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{ { 0x88 }, 2, T, R, pfx_66, Wn, Ln }, /* vpexpandp{s,d} */
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{ { 0x89 }, 2, T, R, pfx_66, Wn, Ln }, /* vpexpand{d,q} */
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{ { 0x8a }, 2, T, W, pfx_66, Wn, Ln }, /* vpcompressp{s,d} */
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{ { 0x8a }, 2, T, W, pfx_66, Wn, Ln }, /* vcompressp{s,d} */
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{ { 0x8b }, 2, T, W, pfx_66, Wn, Ln }, /* vpcompress{d,q} */
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{ { 0x8d }, 2, F, R, pfx_66, Wn, Ln }, /* vperm{b,w} */
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{ { 0x8f }, 2, F, R, pfx_66, W0, Ln }, /* vpshufbitqmb */
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