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x86/spec-ctrl: Enumerations for DDP controls
https://www.intel.com/content/www/us/en/developer/articles/technical/software-security-guidance/technical-documentation/data-dependent-prefetcher.html We should offer DDP-CTRL to guests, but I'm not sure when it is appearing in hardware, and it's not massively urgent - the DDP behaviour is mostly sane (having been designed in a post-spectre world) and this is a just-in-case control. Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com> Reviewed-by: Jan Beulich <jbeulich@suse.com>
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@@ -242,6 +242,7 @@ int libxl_cpuid_parse_config(libxl_cpuid_policy_list *cpuid, const char* str)
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{"intel-psfd", 0x00000007, 2, CPUID_REG_EDX, 0, 1},
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{"ipred-ctrl", 0x00000007, 2, CPUID_REG_EDX, 1, 1},
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{"rrsba-ctrl", 0x00000007, 2, CPUID_REG_EDX, 2, 1},
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{"ddp-ctrl", 0x00000007, 2, CPUID_REG_EDX, 3, 1},
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{"bhi-ctrl", 0x00000007, 2, CPUID_REG_EDX, 4, 1},
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{"mcdt-no", 0x00000007, 2, CPUID_REG_EDX, 5, 1},
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@@ -216,7 +216,7 @@ static const char *const str_7d1[32] =
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static const char *const str_7d2[32] =
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{
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[ 0] = "intel-psfd", [ 1] = "ipred-ctrl",
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[ 2] = "rrsba-ctrl",
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[ 2] = "rrsba-ctrl", [ 3] = "ddp-ctrl",
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[ 4] = "bhi-ctrl", [ 5] = "mcdt-no",
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};
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@@ -41,6 +41,7 @@
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#define SPEC_CTRL_RRSBA_DIS_U (_AC(1, ULL) << 5)
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#define SPEC_CTRL_RRSBA_DIS_S (_AC(1, ULL) << 6)
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#define SPEC_CTRL_PSFD (_AC(1, ULL) << 7)
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#define SPEC_CTRL_DDP_DIS_U (_AC(1, ULL) << 8)
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#define SPEC_CTRL_BHI_DIS_S (_AC(1, ULL) << 10)
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#define MSR_PRED_CMD 0x00000049
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@@ -294,6 +294,7 @@ XEN_CPUFEATURE(INTEL_PPIN, 12*32+ 0) /* Protected Processor Inventory
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XEN_CPUFEATURE(INTEL_PSFD, 13*32+ 0) /*A MSR_SPEC_CTRL.PSFD */
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XEN_CPUFEATURE(IPRED_CTRL, 13*32+ 1) /* MSR_SPEC_CTRL.IPRED_DIS_* */
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XEN_CPUFEATURE(RRSBA_CTRL, 13*32+ 2) /* MSR_SPEC_CTRL.RRSBA_DIS_* */
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XEN_CPUFEATURE(DDP_CTRL, 13*32+ 3) /* MSR_SPEC_CTRL.DDP_DIS_U */
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XEN_CPUFEATURE(BHI_CTRL, 13*32+ 4) /* MSR_SPEC_CTRL.BHI_DIS_S */
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XEN_CPUFEATURE(MCDT_NO, 13*32+ 5) /*A MCDT_NO */
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