Merge branch 'staging' of ssh://xenbits.xen.org/home/xen/git/xen into staging

This commit is contained in:
Ian Campbell committed 2015-11-16 13:38:33 +00:00
commit d07f63fa6e
8 files changed
+35 -24

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+2 -2
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@@ -162,13 +162,13 @@ static inline u32 _phys_pkg_id(u32 cpuid_apic, int index_msb)
/*
* cpuid returns the value latched in the HW at reset, not the APIC ID
* register's value. For any box whose BIOS changes APIC IDs, like
* clustered APIC systems, we must use hard_smp_processor_id.
* clustered APIC systems, we must use get_apic_id().
*
* See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
*/
static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
{
return _phys_pkg_id(hard_smp_processor_id(), index_msb);
return _phys_pkg_id(get_apic_id(), index_msb);
}
/* Do minimum CPU detection early.
+2 -1
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@@ -20,6 +20,7 @@
#include <asm/processor.h>
#include <asm/system.h>
#include <asm/apic.h>
#include <asm/msr.h>
#include <asm/p2m.h>
@@ -980,7 +981,7 @@ static void do_mc_get_cpu_info(void *v)
cpuid(1, &junk, &ebx, &junk, &junk);
xcp->mc_clusterid = (ebx >> 24) & 0xff;
} else
xcp->mc_clusterid = hard_smp_processor_id();
xcp->mc_clusterid = get_apic_id();
}
+9 -3
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@@ -1039,7 +1039,7 @@ static void __init setup_IO_APIC_irqs(void)
disable_8259A_irq(irq_to_desc(irq));
desc = irq_to_desc(irq);
SET_DEST(entry, logical, cpu_mask_to_apicid(desc->arch.cpu_mask));
SET_DEST(entry, logical, get_apic_id());
spin_lock_irqsave(&ioapic_lock, flags);
__ioapic_write_entry(apic, pin, 0, entry);
set_native_irq_info(irq, TARGET_CPUS);
@@ -1843,7 +1843,7 @@ static void __init unlock_ExtINT_logic(void)
entry1.dest_mode = 0; /* physical delivery */
entry1.mask = 0; /* unmask IRQ now */
SET_DEST(entry1, physical, hard_smp_processor_id());
SET_DEST(entry1, physical, get_apic_id());
entry1.delivery_mode = dest_ExtINT;
entry1.polarity = entry0.polarity;
entry1.trigger = 0;
@@ -2201,6 +2201,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
{
struct irq_desc *desc = irq_to_desc(irq);
struct IO_APIC_route_entry entry;
cpumask_t mask;
unsigned long flags;
int vector;
@@ -2220,7 +2221,6 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
entry.delivery_mode = INT_DELIVERY_MODE;
entry.dest_mode = INT_DEST_MODE;
SET_DEST(entry, logical, cpu_mask_to_apicid(TARGET_CPUS));
entry.trigger = edge_level;
entry.polarity = active_high_low;
entry.mask = 1;
@@ -2236,6 +2236,12 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
return vector;
entry.vector = vector;
cpumask_copy(&mask, TARGET_CPUS);
/* Don't chance ending up with an empty mask. */
if (cpumask_intersects(&mask, desc->arch.cpu_mask))
cpumask_and(&mask, &mask, desc->arch.cpu_mask);
SET_DEST(entry, logical, cpu_mask_to_apicid(&mask));
apic_printk(APIC_DEBUG, KERN_DEBUG "IOAPIC[%d]: Set PCI routing entry "
"(%d-%d -> %#x -> IRQ %d Mode:%i Active:%i)\n", ioapic,
mp_ioapics[ioapic].mpc_apicid, pin, entry.vector, irq,
+19 -8
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@@ -563,21 +563,26 @@ int assign_irq_vector(int irq, const cpumask_t *mask)
* Initialize vector_irq on a new cpu. This function must be called
* with vector_lock held.
*/
void __setup_vector_irq(int cpu)
void setup_vector_irq(unsigned int cpu)
{
int irq, vector;
unsigned int irq, vector;
/* Clear vector_irq */
for (vector = 0; vector < NR_VECTORS; ++vector)
for ( vector = 0; vector < NR_VECTORS; ++vector )
per_cpu(vector_irq, cpu)[vector] = INT_MIN;
/* Mark the inuse vectors */
for (irq = 0; irq < nr_irqs; ++irq) {
for ( irq = 0; irq < nr_irqs; ++irq )
{
struct irq_desc *desc = irq_to_desc(irq);
if (!irq_desc_initialized(desc) ||
!cpumask_test_cpu(cpu, desc->arch.cpu_mask))
if ( !irq_desc_initialized(desc) )
continue;
vector = irq_to_vector(irq);
if ( vector >= FIRST_HIPRIORITY_VECTOR &&
vector <= LAST_HIPRIORITY_VECTOR )
cpumask_set_cpu(cpu, desc->arch.cpu_mask);
else if ( !cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
continue;
per_cpu(vector_irq, cpu)[vector] = irq;
}
}
@@ -2334,8 +2339,8 @@ void fixup_irqs(void)
for ( irq = 0; irq < nr_irqs; irq++ )
{
int break_affinity = 0;
int set_affinity = 1;
bool_t break_affinity = 0, set_affinity = 1;
unsigned int vector;
cpumask_t affinity;
if ( irq == 2 )
@@ -2347,6 +2352,12 @@ void fixup_irqs(void)
spin_lock(&desc->lock);
vector = irq_to_vector(irq);
if ( vector >= FIRST_HIPRIORITY_VECTOR &&
vector <= LAST_HIPRIORITY_VECTOR )
cpumask_and(desc->arch.cpu_mask, desc->arch.cpu_mask,
&cpu_online_map);
cpumask_copy(&affinity, desc->affinity);
if ( !desc->action || cpumask_subset(&affinity, &cpu_online_map) )
{
-5
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@@ -23,11 +23,6 @@
#include <asm/hvm/support.h>
#include <mach_apic.h>
int hard_smp_processor_id(void)
{
return get_apic_id();
}
/*
* send_IPI_mask(cpumask, vector): sends @vector IPI to CPUs in @cpumask,
* excluding the local CPU. @cpumask may be empty.
+2 -2
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@@ -387,7 +387,7 @@ void start_secondary(void *unused)
* this lock ensures we don't half assign or remove an irq from a cpu.
*/
lock_vector_lock();
__setup_vector_irq(cpu);
setup_vector_irq(cpu);
cpumask_set_cpu(cpu, &cpu_online_map);
unlock_vector_lock();
@@ -854,7 +854,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
{
printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
boot_cpu_physical_apicid);
physid_set(hard_smp_processor_id(), phys_cpu_present_map);
physid_set(get_apic_id(), phys_cpu_present_map);
}
/* If we couldn't find a local APIC, then get out of here now! */
+1 -1
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@@ -167,7 +167,7 @@ extern struct irq_desc *irq_desc;
void lock_vector_lock(void);
void unlock_vector_lock(void);
void __setup_vector_irq(int cpu);
void setup_vector_irq(unsigned int cpu);
void move_native_irq(struct irq_desc *);
void move_masked_irq(struct irq_desc *);
-2
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@@ -54,8 +54,6 @@ int cpu_add(uint32_t apic_id, uint32_t acpi_id, uint32_t pxm);
*/
#define raw_smp_processor_id() (get_processor_id())
int hard_smp_processor_id(void);
void __stop_this_cpu(void);
long cpu_up_helper(void *data);
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