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https://github.com/xen-project/xen.git
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Merge branch 'staging' of ssh://xenbits.xen.org/home/xen/git/xen into staging
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@@ -162,13 +162,13 @@ static inline u32 _phys_pkg_id(u32 cpuid_apic, int index_msb)
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/*
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* cpuid returns the value latched in the HW at reset, not the APIC ID
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* register's value. For any box whose BIOS changes APIC IDs, like
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* clustered APIC systems, we must use hard_smp_processor_id.
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* clustered APIC systems, we must use get_apic_id().
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*
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* See Intel's IA-32 SW Dev's Manual Vol2 under CPUID.
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*/
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static inline u32 phys_pkg_id(u32 cpuid_apic, int index_msb)
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{
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return _phys_pkg_id(hard_smp_processor_id(), index_msb);
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return _phys_pkg_id(get_apic_id(), index_msb);
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}
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/* Do minimum CPU detection early.
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@@ -20,6 +20,7 @@
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#include <asm/processor.h>
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#include <asm/system.h>
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#include <asm/apic.h>
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#include <asm/msr.h>
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#include <asm/p2m.h>
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@@ -980,7 +981,7 @@ static void do_mc_get_cpu_info(void *v)
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cpuid(1, &junk, &ebx, &junk, &junk);
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xcp->mc_clusterid = (ebx >> 24) & 0xff;
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} else
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xcp->mc_clusterid = hard_smp_processor_id();
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xcp->mc_clusterid = get_apic_id();
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}
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@@ -1039,7 +1039,7 @@ static void __init setup_IO_APIC_irqs(void)
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disable_8259A_irq(irq_to_desc(irq));
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desc = irq_to_desc(irq);
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SET_DEST(entry, logical, cpu_mask_to_apicid(desc->arch.cpu_mask));
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SET_DEST(entry, logical, get_apic_id());
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spin_lock_irqsave(&ioapic_lock, flags);
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__ioapic_write_entry(apic, pin, 0, entry);
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set_native_irq_info(irq, TARGET_CPUS);
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@@ -1843,7 +1843,7 @@ static void __init unlock_ExtINT_logic(void)
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entry1.dest_mode = 0; /* physical delivery */
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entry1.mask = 0; /* unmask IRQ now */
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SET_DEST(entry1, physical, hard_smp_processor_id());
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SET_DEST(entry1, physical, get_apic_id());
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entry1.delivery_mode = dest_ExtINT;
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entry1.polarity = entry0.polarity;
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entry1.trigger = 0;
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@@ -2201,6 +2201,7 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
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{
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struct irq_desc *desc = irq_to_desc(irq);
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struct IO_APIC_route_entry entry;
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cpumask_t mask;
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unsigned long flags;
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int vector;
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@@ -2220,7 +2221,6 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
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entry.delivery_mode = INT_DELIVERY_MODE;
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entry.dest_mode = INT_DEST_MODE;
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SET_DEST(entry, logical, cpu_mask_to_apicid(TARGET_CPUS));
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entry.trigger = edge_level;
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entry.polarity = active_high_low;
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entry.mask = 1;
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@@ -2236,6 +2236,12 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
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return vector;
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entry.vector = vector;
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cpumask_copy(&mask, TARGET_CPUS);
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/* Don't chance ending up with an empty mask. */
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if (cpumask_intersects(&mask, desc->arch.cpu_mask))
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cpumask_and(&mask, &mask, desc->arch.cpu_mask);
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SET_DEST(entry, logical, cpu_mask_to_apicid(&mask));
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apic_printk(APIC_DEBUG, KERN_DEBUG "IOAPIC[%d]: Set PCI routing entry "
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"(%d-%d -> %#x -> IRQ %d Mode:%i Active:%i)\n", ioapic,
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mp_ioapics[ioapic].mpc_apicid, pin, entry.vector, irq,
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+19
-8
@@ -563,21 +563,26 @@ int assign_irq_vector(int irq, const cpumask_t *mask)
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* Initialize vector_irq on a new cpu. This function must be called
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* with vector_lock held.
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*/
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void __setup_vector_irq(int cpu)
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void setup_vector_irq(unsigned int cpu)
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{
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int irq, vector;
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unsigned int irq, vector;
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/* Clear vector_irq */
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for (vector = 0; vector < NR_VECTORS; ++vector)
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for ( vector = 0; vector < NR_VECTORS; ++vector )
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per_cpu(vector_irq, cpu)[vector] = INT_MIN;
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/* Mark the inuse vectors */
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for (irq = 0; irq < nr_irqs; ++irq) {
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for ( irq = 0; irq < nr_irqs; ++irq )
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{
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struct irq_desc *desc = irq_to_desc(irq);
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if (!irq_desc_initialized(desc) ||
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!cpumask_test_cpu(cpu, desc->arch.cpu_mask))
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if ( !irq_desc_initialized(desc) )
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continue;
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vector = irq_to_vector(irq);
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if ( vector >= FIRST_HIPRIORITY_VECTOR &&
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vector <= LAST_HIPRIORITY_VECTOR )
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cpumask_set_cpu(cpu, desc->arch.cpu_mask);
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else if ( !cpumask_test_cpu(cpu, desc->arch.cpu_mask) )
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continue;
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per_cpu(vector_irq, cpu)[vector] = irq;
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}
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}
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@@ -2334,8 +2339,8 @@ void fixup_irqs(void)
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for ( irq = 0; irq < nr_irqs; irq++ )
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{
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int break_affinity = 0;
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int set_affinity = 1;
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bool_t break_affinity = 0, set_affinity = 1;
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unsigned int vector;
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cpumask_t affinity;
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if ( irq == 2 )
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@@ -2347,6 +2352,12 @@ void fixup_irqs(void)
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spin_lock(&desc->lock);
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vector = irq_to_vector(irq);
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if ( vector >= FIRST_HIPRIORITY_VECTOR &&
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vector <= LAST_HIPRIORITY_VECTOR )
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cpumask_and(desc->arch.cpu_mask, desc->arch.cpu_mask,
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&cpu_online_map);
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cpumask_copy(&affinity, desc->affinity);
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if ( !desc->action || cpumask_subset(&affinity, &cpu_online_map) )
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{
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@@ -23,11 +23,6 @@
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#include <asm/hvm/support.h>
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#include <mach_apic.h>
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int hard_smp_processor_id(void)
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{
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return get_apic_id();
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}
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/*
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* send_IPI_mask(cpumask, vector): sends @vector IPI to CPUs in @cpumask,
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* excluding the local CPU. @cpumask may be empty.
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@@ -387,7 +387,7 @@ void start_secondary(void *unused)
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* this lock ensures we don't half assign or remove an irq from a cpu.
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*/
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lock_vector_lock();
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__setup_vector_irq(cpu);
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setup_vector_irq(cpu);
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cpumask_set_cpu(cpu, &cpu_online_map);
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unlock_vector_lock();
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@@ -854,7 +854,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
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{
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printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
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boot_cpu_physical_apicid);
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physid_set(hard_smp_processor_id(), phys_cpu_present_map);
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physid_set(get_apic_id(), phys_cpu_present_map);
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}
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/* If we couldn't find a local APIC, then get out of here now! */
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@@ -167,7 +167,7 @@ extern struct irq_desc *irq_desc;
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void lock_vector_lock(void);
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void unlock_vector_lock(void);
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void __setup_vector_irq(int cpu);
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void setup_vector_irq(unsigned int cpu);
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void move_native_irq(struct irq_desc *);
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void move_masked_irq(struct irq_desc *);
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@@ -54,8 +54,6 @@ int cpu_add(uint32_t apic_id, uint32_t acpi_id, uint32_t pxm);
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*/
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#define raw_smp_processor_id() (get_processor_id())
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int hard_smp_processor_id(void);
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void __stop_this_cpu(void);
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long cpu_up_helper(void *data);
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