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xen/arm64: Remove hardcoded value for gic in assembly code
- arm64: use V2M_GIC_BASE_ADDRESS - only expose GIC_*_ADDRESS to assembly. The C code uses base addresses provide by the device tree Signed-off-by: Julien Grall <julien.grall@linaro.org> Acked-by: Ian Campbell <ian.campbell@citrix.com>
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Julien Grall authored and 
Ian Campbell committed
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@@ -21,6 +21,7 @@
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#include <asm/config.h>
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#include <asm/page.h>
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#include <asm/asm_defns.h>
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#include <asm/platforms/vexpress.h>
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/* Get up a CPU into EL2. Clobbers x0-x3.
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*
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@@ -53,18 +54,18 @@ enter_el2_mode:
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*/
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cbnz x22, 1f
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ldr x1, =(GIC_BASE_ADDRESS+GIC_DR_OFFSET) // GICD_CTLR
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ldr x1, =(V2M_GIC_BASE_ADDRESS+GIC_DR_OFFSET) // GICD_CTLR
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mov w0, #3 // EnableGrp0 | EnableGrp1
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str w0, [x1]
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1: ldr x1, =(GIC_BASE_ADDRESS+GIC_DR_OFFSET+0x80) // GICD_IGROUPR
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1: ldr x1, =(V2M_GIC_BASE_ADDRESS+GIC_DR_OFFSET+0x80) // GICD_IGROUPR
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mov w0, #~0 // Grp1 interrupts
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str w0, [x1], #4
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b.ne 2f // Only local interrupts for secondary CPUs
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str w0, [x1], #4
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str w0, [x1], #4
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2: ldr x1, =(GIC_BASE_ADDRESS+GIC_CR_OFFSET) // GICC_CTLR
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2: ldr x1, =(V2M_GIC_BASE_ADDRESS+GIC_CR_OFFSET) // GICC_CTLR
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ldr w0, [x1]
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mov w0, #3 // EnableGrp0 | EnableGrp1
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str w0, [x1]
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@@ -141,12 +141,16 @@ extern unsigned long frametable_virt_end;
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#define watchdog_disable() ((void)0)
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#define watchdog_enable() ((void)0)
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/* Board-specific: base address of GIC + its regs */
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#define GIC_BASE_ADDRESS 0x2c000000
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#ifdef __ASSEMBLY__
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/* Board-specific: regs base address for the GIC
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* Theses constants are only intend to be used in assembly file
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* because the DT is not yet parsed.
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*/
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#define GIC_DR_OFFSET 0x1000
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#define GIC_CR_OFFSET 0x2000
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#define GIC_HR_OFFSET 0x4000 /* Guess work http://lists.infradead.org/pipermail/linux-arm-kernel/2011-September/064219.html */
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#define GIC_VR_OFFSET 0x6000 /* Virtual Machine CPU interface) */
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#endif /* __ASSEMBLY__ */
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#endif /* __ARM_CONFIG_H__ */
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/*
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