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xend: Restore bridge control register after secondary bus reset
From: Chris Dalton <cid@hp.com> Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
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1 parent
05272715e2
commit
d0fedc8895
1 file changed
+6
-3
@@ -475,14 +475,17 @@ class PciDevice:
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sysfs_mnt = find_sysfs_mnt()
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parent_path = sysfs_mnt + SYSFS_PCI_DEVS_PATH + '/' + \
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target_bus + SYSFS_PCI_DEV_CONFIG_PATH
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fd = os.open(parent_path, os.O_WRONLY)
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fd = os.open(parent_path, os.O_RDWR)
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# Save state of bridge control register - restore after reset
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os.lseek(fd, PCI_CB_BRIDGE_CONTROL, 0)
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br_cntl = (struct.unpack('H', os.read(fd, 2)))[0]
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# Assert Secondary Bus Reset
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os.lseek(fd, PCI_CB_BRIDGE_CONTROL, 0)
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os.write(fd, struct.pack('I', PCI_BRIDGE_CTL_BUS_RESET))
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time.sleep(0.200)
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# De-assert Secondary Bus Reset
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os.lseek(fd, 0x3e, 0)
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os.write(fd, struct.pack('I', 0x00))
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os.lseek(fd, PCI_CB_BRIDGE_CONTROL, 0)
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os.write(fd, struct.pack('H', br_cntl))
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time.sleep(0.200)
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os.close(fd)
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