xend: Restore bridge control register after secondary bus reset

From: Chris Dalton <cid@hp.com>
Signed-off-by: Keir Fraser <keir.fraser@citrix.com>
This commit is contained in:
Keir Fraser committed 2008-10-10 11:52:26 +01:00
1 parent 05272715e2
commit d0fedc8895
1 file changed
+6 -3
+6 -3
View File
@@ -475,14 +475,17 @@ class PciDevice:
sysfs_mnt = find_sysfs_mnt()
parent_path = sysfs_mnt + SYSFS_PCI_DEVS_PATH + '/' + \
target_bus + SYSFS_PCI_DEV_CONFIG_PATH
fd = os.open(parent_path, os.O_WRONLY)
fd = os.open(parent_path, os.O_RDWR)
# Save state of bridge control register - restore after reset
os.lseek(fd, PCI_CB_BRIDGE_CONTROL, 0)
br_cntl = (struct.unpack('H', os.read(fd, 2)))[0]
# Assert Secondary Bus Reset
os.lseek(fd, PCI_CB_BRIDGE_CONTROL, 0)
os.write(fd, struct.pack('I', PCI_BRIDGE_CTL_BUS_RESET))
time.sleep(0.200)
# De-assert Secondary Bus Reset
os.lseek(fd, 0x3e, 0)
os.write(fd, struct.pack('I', 0x00))
os.lseek(fd, PCI_CB_BRIDGE_CONTROL, 0)
os.write(fd, struct.pack('H', br_cntl))
time.sleep(0.200)
os.close(fd)
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