[HVM] vlapic: Synchronously determine PPR register value whenevr it is needed.

Signed-off-by: Keir Fraser <keir@xensource.com>

xen/arch/x86/hvm/svm/svm.c

@@ -56,7 +56,6 @@
 
 extern int inst_copy_from_guest(unsigned char *buf, unsigned long guest_eip,
                                 int inst_len);
-extern uint32_t vlapic_update_ppr(struct vlapic *vlapic);
 extern asmlinkage void do_IRQ(struct cpu_user_regs *);
 extern void svm_dump_inst(unsigned long eip);
 extern int svm_dbg_on;
@@ -1838,7 +1837,6 @@ static int mov_to_cr(int gpreg, int cr, struct cpu_user_regs *regs)
         if ( vlapic == NULL )
             break;
         vlapic_set_reg(vlapic, APIC_TASKPRI, ((value & 0x0F) << 4));
-        vlapic_update_ppr(vlapic);
         break;
     }
 

xen/arch/x86/hvm/vlapic.c

@@ -181,26 +181,19 @@ int vlapic_find_highest_isr(struct vlapic *vlapic)
     return result;
 }
 
-uint32_t vlapic_update_ppr(struct vlapic *vlapic)
+uint32_t vlapic_get_ppr(struct vlapic *vlapic)
 {
     uint32_t tpr, isrv, ppr;
     int isr;
 
-    tpr = vlapic_get_reg(vlapic, APIC_TASKPRI);
+    tpr  = vlapic_get_reg(vlapic, APIC_TASKPRI);
+    isr  = vlapic_find_highest_isr(vlapic);
+    isrv = (isr != -1) ? isr : 0;
 
-    isr = vlapic_find_highest_isr(vlapic);
-
-    if ( isr != -1 )
-        isrv = (isr >> 4) & 0xf;   /* ditto */
-    else
-        isrv = 0;
-
-    if ( (tpr >> 4) >= isrv )
+    if ( (tpr & 0xf0) >= (isrv & 0xf0) )
         ppr = tpr & 0xff;
     else
-        ppr = isrv << 4;  /* low 4 bits of PPR have to be cleared */
-
-    vlapic_set_reg(vlapic, APIC_PROCPRI, ppr);
+        ppr = isrv & 0xf0;
 
     HVM_DBG_LOG(DBG_LEVEL_VLAPIC_INTERRUPT,
                 "vlapic %p, ppr 0x%x, isr 0x%x, isrv 0x%x.",
@@ -444,7 +437,6 @@ void vlapic_EOI_set(struct vlapic *vlapic)
         return ;
 
     vlapic_clear_vector(vector, vlapic->regs + APIC_ISR);
-    vlapic_update_ppr(vlapic);
 
     if ( vlapic_test_and_clear_vector(vector, vlapic->regs + APIC_TMR) )
         ioapic_update_EOI(vlapic->domain, vector);
@@ -555,8 +547,7 @@ static void vlapic_read_aligned(struct vlapic *vlapic, unsigned int offset,
 
     switch ( offset ) {
     case APIC_PROCPRI:
-        vlapic_update_ppr(vlapic);
-        *result = vlapic_get_reg(vlapic, offset);
+        *result = vlapic_get_ppr(vlapic);
         break;
 
     case APIC_ARBPRI:
@@ -683,7 +674,6 @@ static void vlapic_write(struct vcpu *v, unsigned long address,
 
     case APIC_TASKPRI:
         vlapic_set_reg(vlapic, APIC_TASKPRI, val & 0xff);
-        vlapic_update_ppr(vlapic);
         vlapic->flush_tpr_threshold = 1;
         break;
 
@@ -912,7 +902,7 @@ int cpu_get_apic_interrupt(struct vcpu *v, int *mode)
 
     highest_irr = vlapic_find_highest_irr(vlapic);
     if ( (highest_irr == -1) ||
-         ((highest_irr & 0xF0) <= vlapic_get_reg(vlapic, APIC_PROCPRI)) )
+         ((highest_irr & 0xF0) <= vlapic_get_ppr(vlapic)) )
         return -1;
 
     *mode = APIC_DM_FIXED;
@@ -949,7 +939,6 @@ void vlapic_post_injection(struct vcpu *v, int vector, int deliver_mode)
     case APIC_DM_LOWEST:
         vlapic_set_vector(vector, vlapic->regs + APIC_ISR);
         vlapic_clear_irr(vector, vlapic);
-        vlapic_update_ppr(vlapic);
         if ( (vector == vlapic_lvt_vector(vlapic, APIC_LVTT)) &&
              (vlapic->timer_pending_count != 0) )
         {

xen/arch/x86/hvm/vmx/vmx.c

@@ -47,8 +47,6 @@
 #include <asm/hvm/vlapic.h>
 #include <asm/x86_emulate.h>
 
-extern uint32_t vlapic_update_ppr(struct vlapic *vlapic);
-
 static DEFINE_PER_CPU(unsigned long, trace_values[5]);
 #define TRACE_VMEXIT(index,value) this_cpu(trace_values)[index]=value
 
@@ -1808,7 +1806,6 @@ static int mov_to_cr(int gp, int cr, struct cpu_user_regs *regs)
         if ( vlapic == NULL )
             break;
         vlapic_set_reg(vlapic, APIC_TASKPRI, ((value & 0x0F) << 4));
-        vlapic_update_ppr(vlapic);
         break;
     }
     default:
@@ -2410,7 +2407,6 @@ asmlinkage void vmx_vmexit_handler(struct cpu_user_regs *regs)
         break;
 
     case EXIT_REASON_TPR_BELOW_THRESHOLD:
-        vlapic_update_ppr(VLAPIC(v));
         VLAPIC(v)->flush_tpr_threshold = 1;
         break;
 

xen/include/asm-x86/hvm/vlapic.h

@@ -81,8 +81,6 @@ int vlapic_init(struct vcpu *vc);
 
 void vlapic_msr_set(struct vlapic *vlapic, uint64_t value);
 
-uint32_t vlapic_update_ppr(struct vlapic *vlapic);
-
 int vlapic_accept_pic_intr(struct vcpu *v);
 
 struct vlapic *apic_round_robin(struct domain *d,