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x86: defer processing events on the NMI exit path
Otherwise, we may end up in the scheduler, keeping NMIs masked for a possibly unbounded period of time (until whenever the next IRET gets executed). Enforce timely event processing by sending a self IPI. Of course it's open for discussion whether to always use the straight exit path from handle_ist_exception. Signed-off-by: Jan Beulich <jbeulich@suse.com> Acked-by: Keir Fraser <keir@xen.org>
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@@ -171,7 +171,7 @@ compat_bad_hypercall:
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jmp compat_test_all_events
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/* %rbx: struct vcpu, interrupts disabled */
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compat_restore_all_guest:
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ENTRY(compat_restore_all_guest)
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ASSERT_INTERRUPTS_DISABLED
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RESTORE_ALL adj=8 compat=1
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.Lft0: iretq
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@@ -11,6 +11,7 @@
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#include <asm/apicdef.h>
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#include <asm/page.h>
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#include <public/xen.h>
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#include <irq_vectors.h>
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ALIGN
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/* %rbx: struct vcpu */
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@@ -615,6 +616,9 @@ ENTRY(early_page_fault)
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jmp restore_all_xen
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.popsection
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ENTRY(nmi)
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pushq $0
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movl $TRAP_nmi,4(%rsp)
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handle_ist_exception:
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SAVE_ALL
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testb $3,UREGS_cs(%rsp)
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@@ -629,12 +633,25 @@ handle_ist_exception:
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movzbl UREGS_entry_vector(%rsp),%eax
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leaq exception_table(%rip),%rdx
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callq *(%rdx,%rax,8)
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jmp ret_from_intr
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cmpb $TRAP_nmi,UREGS_entry_vector(%rsp)
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jne ret_from_intr
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ENTRY(nmi)
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pushq $0
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movl $TRAP_nmi,4(%rsp)
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jmp handle_ist_exception
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/* We want to get straight to the IRET on the NMI exit path. */
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testb $3,UREGS_cs(%rsp)
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jz restore_all_xen
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GET_CURRENT(%rbx)
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/* Send an IPI to ourselves to cover for the lack of event checking. */
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movl VCPU_processor(%rbx),%eax
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shll $IRQSTAT_shift,%eax
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leaq irq_stat(%rip),%rcx
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cmpl $0,(%rcx,%rax,1)
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je 1f
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movl $EVENT_CHECK_VECTOR,%edi
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call send_IPI_self
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1: movq VCPU_domain(%rbx),%rax
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cmpb $0,DOMAIN_is_32bit_pv(%rax)
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je restore_all_guest
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jmp compat_restore_all_guest
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ENTRY(nmi_crash)
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pushq $0
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