tools/libxc: Properly increment ApicIdCoreSize field on AMD

Current code incorrectly adds 1 to full register instead of
incrementing the field in bits 15:12.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
(cherry picked from commit a3336a5075)
This commit is contained in:
Boris Ostrovsky authored and Ian Jackson committed 2016-08-15 11:19:43 +01:00
1 parent ab75cdf635
commit de781b47f4
1 file changed
+2 -1
+2 -1
View File
@@ -331,7 +331,8 @@ static void amd_xc_cpuid_policy(xc_interface *xch,
* ECX[15:12] is ApicIdCoreSize: ECX[7:0] is NumberOfCores (minus one).
* Update to reflect vLAPIC_ID = vCPU_ID * 2.
*/
regs[2] = ((regs[2] & 0xf000u) + 1) | ((regs[2] & 0xffu) << 1) | 1u;
regs[2] = ((regs[2] + (1u << 12)) & 0xf000u) |
((regs[2] & 0xffu) << 1) | 1u;
break;
case 0x8000000a: {
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