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bitkeeper revision 1.83 (3e5636c8h7gxJ2TkjvrnmiqkZh15Bg)
cpufeature.h, kernel.c, setup.c, mpparse.c: Hyperthreading support. We now parse ACPI tables at start of day. Both can be disabled with 'noht' and 'noacpi' cmdline options.
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04c216516f
commit
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4 files changed
+32
-15
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@@ -781,7 +781,7 @@ void __init get_smp_config (void)
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* processor(s) that are provided by the MPS. We attempt to
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* check only if the user provided a commandline override
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*/
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//XXX Xen config_acpi_tables();
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config_acpi_tables();
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#endif
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printk("Intel MultiProcessor Specification v1.%d\n", mpf->mpf_specification);
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@@ -103,6 +103,7 @@ static void __init init_amd(struct cpuinfo_x86 *c)
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*/
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void __init identify_cpu(struct cpuinfo_x86 *c)
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{
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extern int opt_noht, opt_noacpi;
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int junk, i;
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u32 xlvl, tfms;
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@@ -163,6 +164,12 @@ void __init identify_cpu(struct cpuinfo_x86 *c)
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panic("Only support Intel processors (P6+)\n");
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}
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if ( opt_noht )
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{
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opt_noacpi = 1; /* Virtual CPUs only appear in ACPI tables. */
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clear_bit(X86_FEATURE_HT, &c->x86_capability[0]);
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}
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printk("CPU caps: %08x %08x %08x %08x\n",
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c->x86_capability[0],
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c->x86_capability[1],
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+21
-14
@@ -45,7 +45,8 @@ unsigned long opt_dom0_ip = 0;
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unsigned int opt_dom0_mem = 16000; /* default kbytes for DOM0 */
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unsigned int opt_ne_base = 0; /* NE2k NICs cannot be probed */
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unsigned char opt_ifname[10] = "eth0";
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enum { OPT_IP, OPT_STR, OPT_UINT };
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int opt_noht=0, opt_noacpi=0;
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enum { OPT_IP, OPT_STR, OPT_UINT, OPT_BOOL };
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static struct {
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unsigned char *name;
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int type;
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@@ -55,6 +56,8 @@ static struct {
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{ "dom0_mem", OPT_UINT, &opt_dom0_mem },
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{ "ne_base", OPT_UINT, &opt_ne_base },
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{ "ifname", OPT_STR, &opt_ifname },
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{ "noht", OPT_BOOL, &opt_noht },
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{ "noacpi", OPT_BOOL, &opt_noacpi },
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{ NULL, 0, NULL }
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};
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@@ -125,27 +128,31 @@ void cmain (unsigned long magic, multiboot_info_t *mbi)
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while ( cmdline != NULL )
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{
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while ( *cmdline == ' ' ) cmdline++;
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if ( (opt = strchr(cmdline, '=')) == NULL ) break;
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*opt++ = '\0';
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opt_end = strchr(opt, ' ');
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if ( *cmdline == '\0' ) break;
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opt_end = strchr(cmdline, ' ');
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if ( opt_end != NULL ) *opt_end++ = '\0';
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opt = strchr(cmdline, '=');
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if ( opt != NULL ) *opt++ = '\0';
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for ( i = 0; opts[i].name != NULL; i++ )
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{
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if ( strcmp(opts[i].name, cmdline ) == 0 )
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if ( strcmp(opts[i].name, cmdline ) != 0 ) continue;
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switch ( opts[i].type )
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{
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if ( opts[i].type == OPT_IP )
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{
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case OPT_IP:
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if ( opt != NULL )
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*(unsigned long *)opts[i].var = str_to_quad(opt);
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}
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else if(opts[i].type == OPT_STR)
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{
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break;
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case OPT_STR:
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if ( opt != NULL )
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strcpy(opts[i].var, opt);
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}
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else /* opts[i].type == OPT_UINT */
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{
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break;
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case OPT_UINT:
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if ( opt != NULL )
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*(unsigned int *)opts[i].var =
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simple_strtol(opt, (char **)&opt, 0);
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}
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break;
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case OPT_BOOL:
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*(int *)opts[i].var = 1;
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break;
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}
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}
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@@ -40,6 +40,7 @@
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#define X86_FEATURE_XMM (0*32+25) /* Streaming SIMD Extensions */
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#define X86_FEATURE_XMM2 (0*32+26) /* Streaming SIMD Extensions-2 */
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#define X86_FEATURE_SELFSNOOP (0*32+27) /* CPU self snoop */
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#define X86_FEATURE_HT (0*32+28) /* Hyper-Threading */
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#define X86_FEATURE_ACC (0*32+29) /* Automatic clock control */
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#define X86_FEATURE_IA64 (0*32+30) /* IA-64 processor */
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@@ -63,6 +64,8 @@
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#define X86_FEATURE_CYRIX_ARR (3*32+ 2) /* Cyrix ARRs (= MTRRs) */
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#define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */
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#define cpu_has(c, bit) test_bit(bit, (c)->x86_capability)
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#endif /* __ASM_I386_CPUFEATURE_H */
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/*
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