bitkeeper revision 1.83 (3e5636c8h7gxJ2TkjvrnmiqkZh15Bg)

cpufeature.h, kernel.c, setup.c, mpparse.c:
  Hyperthreading support. We now parse ACPI tables at start of day. Both can be disabled with 'noht' and 'noacpi' cmdline options.
This commit is contained in:
kaf24@labyrinth.cl.cam.ac.uk committed 2003-02-21 14:25:12 +00:00
1 parent 04c216516f
commit eafbcb7353
4 files changed
+32 -15

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+1 -1
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@@ -781,7 +781,7 @@ void __init get_smp_config (void)
* processor(s) that are provided by the MPS. We attempt to
* check only if the user provided a commandline override
*/
//XXX Xen config_acpi_tables();
config_acpi_tables();
#endif
printk("Intel MultiProcessor Specification v1.%d\n", mpf->mpf_specification);
+7
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@@ -103,6 +103,7 @@ static void __init init_amd(struct cpuinfo_x86 *c)
*/
void __init identify_cpu(struct cpuinfo_x86 *c)
{
extern int opt_noht, opt_noacpi;
int junk, i;
u32 xlvl, tfms;
@@ -163,6 +164,12 @@ void __init identify_cpu(struct cpuinfo_x86 *c)
panic("Only support Intel processors (P6+)\n");
}
if ( opt_noht )
{
opt_noacpi = 1; /* Virtual CPUs only appear in ACPI tables. */
clear_bit(X86_FEATURE_HT, &c->x86_capability[0]);
}
printk("CPU caps: %08x %08x %08x %08x\n",
c->x86_capability[0],
c->x86_capability[1],
+21 -14
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@@ -45,7 +45,8 @@ unsigned long opt_dom0_ip = 0;
unsigned int opt_dom0_mem = 16000; /* default kbytes for DOM0 */
unsigned int opt_ne_base = 0; /* NE2k NICs cannot be probed */
unsigned char opt_ifname[10] = "eth0";
enum { OPT_IP, OPT_STR, OPT_UINT };
int opt_noht=0, opt_noacpi=0;
enum { OPT_IP, OPT_STR, OPT_UINT, OPT_BOOL };
static struct {
unsigned char *name;
int type;
@@ -55,6 +56,8 @@ static struct {
{ "dom0_mem", OPT_UINT, &opt_dom0_mem },
{ "ne_base", OPT_UINT, &opt_ne_base },
{ "ifname", OPT_STR, &opt_ifname },
{ "noht", OPT_BOOL, &opt_noht },
{ "noacpi", OPT_BOOL, &opt_noacpi },
{ NULL, 0, NULL }
};
@@ -125,27 +128,31 @@ void cmain (unsigned long magic, multiboot_info_t *mbi)
while ( cmdline != NULL )
{
while ( *cmdline == ' ' ) cmdline++;
if ( (opt = strchr(cmdline, '=')) == NULL ) break;
*opt++ = '\0';
opt_end = strchr(opt, ' ');
if ( *cmdline == '\0' ) break;
opt_end = strchr(cmdline, ' ');
if ( opt_end != NULL ) *opt_end++ = '\0';
opt = strchr(cmdline, '=');
if ( opt != NULL ) *opt++ = '\0';
for ( i = 0; opts[i].name != NULL; i++ )
{
if ( strcmp(opts[i].name, cmdline ) == 0 )
if ( strcmp(opts[i].name, cmdline ) != 0 ) continue;
switch ( opts[i].type )
{
if ( opts[i].type == OPT_IP )
{
case OPT_IP:
if ( opt != NULL )
*(unsigned long *)opts[i].var = str_to_quad(opt);
}
else if(opts[i].type == OPT_STR)
{
break;
case OPT_STR:
if ( opt != NULL )
strcpy(opts[i].var, opt);
}
else /* opts[i].type == OPT_UINT */
{
break;
case OPT_UINT:
if ( opt != NULL )
*(unsigned int *)opts[i].var =
simple_strtol(opt, (char **)&opt, 0);
}
break;
case OPT_BOOL:
*(int *)opts[i].var = 1;
break;
}
}
+3
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@@ -40,6 +40,7 @@
#define X86_FEATURE_XMM (0*32+25) /* Streaming SIMD Extensions */
#define X86_FEATURE_XMM2 (0*32+26) /* Streaming SIMD Extensions-2 */
#define X86_FEATURE_SELFSNOOP (0*32+27) /* CPU self snoop */
#define X86_FEATURE_HT (0*32+28) /* Hyper-Threading */
#define X86_FEATURE_ACC (0*32+29) /* Automatic clock control */
#define X86_FEATURE_IA64 (0*32+30) /* IA-64 processor */
@@ -63,6 +64,8 @@
#define X86_FEATURE_CYRIX_ARR (3*32+ 2) /* Cyrix ARRs (= MTRRs) */
#define X86_FEATURE_CENTAUR_MCR (3*32+ 3) /* Centaur MCRs (= MTRRs) */
#define cpu_has(c, bit) test_bit(bit, (c)->x86_capability)
#endif /* __ASM_I386_CPUFEATURE_H */
/*
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