Remove send_IPI_all, send_IPI_allbutself and send_IPI_self

shortcutting IPI functions. They're either unused or used so
frequently that we may as well simplify things and always use
send_IPI_mask.

Signed-off-by: Keir Fraser <keir@xensource.com>
This commit is contained in:
kaf24@firebug.cl.cam.ac.uk committed 2006-04-03 16:35:06 +01:00
1 parent 5e8883cc8c
commit f55976facf
8 files changed
+26 -176

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-18
View File
@@ -18,15 +18,6 @@
#include <asm/mach-default/mach_ipi.h>
#include <asm/mach-default/mach_mpparse.h>
#ifdef CONFIG_HOTPLUG_CPU
#define DEFAULT_SEND_IPI (1)
#else
#define DEFAULT_SEND_IPI (0)
#endif
int no_broadcast = DEFAULT_SEND_IPI;
integer_param("no_ipi_broadcast", no_broadcast);
/* should be called last. */
static __init int probe_default(void)
{
@@ -34,12 +25,3 @@ static __init int probe_default(void)
}
struct genapic apic_default = APIC_INIT("default", probe_default);
static int __init print_ipi_mode(void)
{
if (genapic == &apic_default)
printk("Using IPI %sShortcut mode\n",
no_broadcast ? "No-" : "");
return 0;
}
__initcall(print_ipi_mode);
+26 -71
View File
@@ -21,6 +21,7 @@
#include <asm/smpboot.h>
#include <asm/hardirq.h>
#include <mach_apic.h>
#include <mach_ipi.h>
/*
* Some notes on x86 processor bugs affecting SMP operation:
@@ -74,38 +75,6 @@ static inline int __prepare_ICR2 (unsigned int mask)
return SET_APIC_DEST_FIELD(mask);
}
void __send_IPI_shortcut(unsigned int shortcut, int vector)
{
/*
* Subtle. In the case of the 'never do double writes' workaround
* we have to lock out interrupts to be safe. As we don't care
* of the value read we use an atomic rmw access to avoid costly
* cli/sti. Otherwise we use an even cheaper single atomic write
* to the APIC.
*/
unsigned int cfg;
/*
* Wait for idle.
*/
apic_wait_icr_idle();
/*
* No need to touch the target chip field
*/
cfg = __prepare_ICR(shortcut, vector);
/*
* Send the IPI. The write to APIC_ICR fires this off.
*/
apic_write_around(APIC_ICR, cfg);
}
void send_IPI_self(int vector)
{
__send_IPI_shortcut(APIC_DEST_SELF, vector);
}
static inline void check_IPI_mask(cpumask_t cpumask)
{
/*
@@ -116,9 +85,6 @@ static inline void check_IPI_mask(cpumask_t cpumask)
ASSERT(!cpus_empty(cpumask));
}
/*
* This is only used on smaller machines.
*/
void send_IPI_mask_bitmask(cpumask_t cpumask, int vector)
{
unsigned long mask = cpus_addr(cpumask)[0];
@@ -168,36 +134,33 @@ inline void send_IPI_mask_sequence(cpumask_t mask, int vector)
local_irq_save(flags);
for (query_cpu = 0; query_cpu < NR_CPUS; ++query_cpu) {
if (cpu_isset(query_cpu, mask)) {
for_each_cpu_mask( query_cpu, mask )
{
/*
* Wait for idle.
*/
apic_wait_icr_idle();
/*
* Wait for idle.
*/
apic_wait_icr_idle();
/*
* prepare target chip field
*/
cfg = __prepare_ICR2(cpu_to_logical_apicid(query_cpu));
apic_write_around(APIC_ICR2, cfg);
/*
* prepare target chip field
*/
cfg = __prepare_ICR2(cpu_to_logical_apicid(query_cpu));
apic_write_around(APIC_ICR2, cfg);
/*
* program the ICR
*/
cfg = __prepare_ICR(0, vector);
/*
* program the ICR
*/
cfg = __prepare_ICR(0, vector);
/*
* Send the IPI. The write to APIC_ICR fires this off.
*/
apic_write_around(APIC_ICR, cfg);
}
/*
* Send the IPI. The write to APIC_ICR fires this off.
*/
apic_write_around(APIC_ICR, cfg);
}
local_irq_restore(flags);
}
#include <mach_ipi.h>
static spinlock_t flush_lock = SPIN_LOCK_UNLOCKED;
static cpumask_t flush_cpumask;
static unsigned long flush_va;
@@ -241,20 +204,12 @@ void __flush_tlb_mask(cpumask_t mask, unsigned long va)
/* Call with no locks held and interrupts enabled (e.g., softirq context). */
void new_tlbflush_clock_period(void)
{
ASSERT(local_irq_is_enabled());
cpumask_t allbutself;
/* Flush everyone else. We definitely flushed just before entry. */
if ( num_online_cpus() > 1 )
{
spin_lock(&flush_lock);
flush_cpumask = cpu_online_map;
flush_va = FLUSHVA_ALL;
send_IPI_allbutself(INVALIDATE_TLB_VECTOR);
cpu_clear(smp_processor_id(), flush_cpumask);
while ( !cpus_empty(flush_cpumask) )
cpu_relax();
spin_unlock(&flush_lock);
}
allbutself = cpu_online_map;
cpu_clear(smp_processor_id(), allbutself);
__flush_tlb_mask(allbutself, FLUSHVA_ALL);
/* No need for atomicity: we are the only possible updater. */
ASSERT(tlbflush_clock == 0);
-4
View File
@@ -54,8 +54,6 @@ struct genapic {
/* ipi */
void (*send_IPI_mask)(cpumask_t mask, int vector);
void (*send_IPI_allbutself)(int vector);
void (*send_IPI_all)(int vector);
};
#define APICFUNC(x) .x = x
@@ -85,8 +83,6 @@ struct genapic {
APICFUNC(cpu_mask_to_apicid), \
APICFUNC(acpi_madt_oem_check), \
APICFUNC(send_IPI_mask), \
APICFUNC(send_IPI_allbutself), \
APICFUNC(send_IPI_all), \
APICFUNC(enable_apic_mode), \
APICFUNC(phys_pkg_id), \
}
@@ -8,18 +8,4 @@ static inline void send_IPI_mask(cpumask_t mask, int vector)
send_IPI_mask_sequence(mask, vector);
}
static inline void send_IPI_allbutself(int vector)
{
cpumask_t mask = cpu_online_map;
cpu_clear(smp_processor_id(), mask);
if (!cpus_empty(mask))
send_IPI_mask(mask, vector);
}
static inline void send_IPI_all(int vector)
{
send_IPI_mask(cpu_online_map, vector);
}
#endif /* __ASM_MACH_IPI_H */
@@ -2,50 +2,10 @@
#define __ASM_MACH_IPI_H
void send_IPI_mask_bitmask(cpumask_t mask, int vector);
void __send_IPI_shortcut(unsigned int shortcut, int vector);
extern int no_broadcast;
static inline void send_IPI_mask(cpumask_t mask, int vector)
{
send_IPI_mask_bitmask(mask, vector);
}
static inline void __local_send_IPI_allbutself(int vector)
{
if (no_broadcast) {
cpumask_t mask = cpu_online_map;
cpu_clear(smp_processor_id(), mask);
send_IPI_mask(mask, vector);
} else
__send_IPI_shortcut(APIC_DEST_ALLBUT, vector);
}
static inline void __local_send_IPI_all(int vector)
{
if (no_broadcast)
send_IPI_mask(cpu_online_map, vector);
else
__send_IPI_shortcut(APIC_DEST_ALLINC, vector);
}
static inline void send_IPI_allbutself(int vector)
{
/*
* if there are no other CPUs in the system then we get an APIC send
* error if we try to broadcast, thus avoid sending IPIs in this case.
*/
if (!(num_online_cpus() > 1))
return;
__local_send_IPI_allbutself(vector);
return;
}
static inline void send_IPI_all(int vector)
{
__local_send_IPI_all(vector);
}
#endif /* __ASM_MACH_IPI_H */
@@ -8,17 +8,4 @@ static inline void send_IPI_mask(cpumask_t mask, int vector)
send_IPI_mask_sequence(mask, vector);
}
static inline void send_IPI_allbutself(int vector)
{
cpumask_t mask = cpu_online_map;
cpu_clear(smp_processor_id(), mask);
if (!cpus_empty(mask))
send_IPI_mask(mask, vector);
}
static inline void send_IPI_all(int vector)
{
send_IPI_mask(cpu_online_map, vector);
}
#endif /* __ASM_MACH_IPI_H */
@@ -4,7 +4,5 @@
#include <asm/genapic.h>
#define send_IPI_mask (genapic->send_IPI_mask)
#define send_IPI_allbutself (genapic->send_IPI_allbutself)
#define send_IPI_all (genapic->send_IPI_all)
#endif
@@ -8,18 +8,4 @@ static inline void send_IPI_mask(cpumask_t mask, int vector)
send_IPI_mask_sequence(mask, vector);
}
static inline void send_IPI_allbutself(int vector)
{
cpumask_t mask = cpu_online_map;
cpu_clear(smp_processor_id(), mask);
if (!cpus_empty(mask))
send_IPI_mask(mask, vector);
}
static inline void send_IPI_all(int vector)
{
send_IPI_mask(cpu_online_map, vector);
}
#endif /* __ASM_MACH_IPI_H */
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