Commit Graph
33969 Commits
Author SHA1 Message Date
Shannon Zhao 0382b0830d libxl/arm: Construct ACPI XSDT table
Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Acked-by: Julien Grall <julien.grall@arm.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-30 11:47:26 +01:00
Shannon Zhao dffe9731c1 libxl/arm: Construct ACPI RSDP table
Construct ACPI RSDP table and add a helper to calculate the ACPI table
checksum.

Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Acked-by: Julien Grall <julien.grall@arm.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-30 11:47:26 +01:00
Shannon Zhao 6ea089962a libxl/arm: Estimate the size of ACPI tables
Estimate the size of ACPI tables and reserve a memory map space for ACPI
tables.

Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-30 11:47:26 +01:00
Shannon Zhao c4ac107799 libxl/arm: Generate static ACPI DSDT table
It uses static DSDT table like the way x86 uses. Currently the DSDT
table only contains processor device objects and it generates the
maximal objects which so far is 128.

While the GUEST_MAX_VCPUS is defined under __XEN__ or __XEN_TOOLS__, it
needs to add -D__XEN_TOOLS__ to compile mk_dsdt.c.

Also only check iasl for aarch64 in configure since ACPI on ARM32 is not
supported.

Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Acked-by: Julien Grall <julien.grall@arm.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
[ wei: run autogen.sh and fix compilation on x86 ]
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
2016-09-30 11:47:26 +01:00
Shannon Zhao a2d88dc215 libxl/arm: prepare for constructing ACPI tables
It only constructs the ACPI tables for 64-bit ARM DomU when user enables
acpi because 32-bit DomU doesn't support ACPI. And the generation codes
are only built for 64-bit toolstack.

Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Acked-by: Julien Grall <julien.grall@arm.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-30 10:21:55 +01:00
Shannon Zhao 3793f58a08 tools/libxl: Add an unified configuration option for ACPI
Since the existing configuration option "u.hvm.acpi" is x86 specific and
we want to reuse it on ARM as well, add a unified option "acpi" for
x86 and ARM, and for ARM it's disabled by default.

Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-30 10:21:55 +01:00
Jan Beulich 946c9ff4f4 pub-headers: reduce C99 dependencies
For consumers not using (fully) C99-aware compilers, limit the number
of places where tweaking of the headers would be necessary: Introduce
and use xen_mk_ullong(), allowing its helper macro to be overridden at
once.

For now don't touch public/io/, which also has a few offenders.

The need to include xen.h in hvm/e820.h demonstrates that it is a bad
idea to include public headers first thing - arch/x86/hvm/mtrr.c needs
adjustment just because of this.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Julien Grall <julien.grall@arm.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-30 10:18:24 +01:00
Jan Beulich 002e3ffb21 x86emul: simplify LEAVE handling
There's no 1-byte operand size case to take care of here, and there's
no point doing the first writeback using dst fields - we can read rBP
and write rSP directly.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-09-30 10:01:14 +02:00
Jan Beulich 0a0b8eb194 x86/PV: split out dealing with MSRs from privileged instruction handling
This is in preparation for using the generic emulator here.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-09-30 09:55:32 +02:00
Jan Beulich 39b682388b x86/PV: split out dealing with DRn from privileged instruction handling
This is in preparation for using the generic emulator here.

Some care is needed temporarily to not unduly alter guest register
state: The local variable "res" can only go away once this code got
fully switched over to using x86_emulate().

Also switch to IS_ERR_VALUE() instead of (incorrectly) open coding it.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-09-30 09:55:08 +02:00
Jan Beulich f745527379 x86/PV: split out dealing with CRn from privileged instruction handling
This is in preparation for using the generic emulator here.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-09-30 09:54:43 +02:00
Jan Beulich ab082ffa87 x86emul: generate and make use of a canonical opcode representation
This representation is then being made available to interested callers,
to facilitate replacing their custom decoding.

This entails combining the three main switch statements into one.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-09-30 09:53:40 +02:00
Jan Beulich 75066cd4ea x86emul: fix {,i}mul and {,i}div
Commit a3db233ede ("x86emul: use DstEax also for {,I}{MUL,DIV}") went
a little too far: DstEax and SrcEax weren't really meant to be used
together with ModRM - they assume modrm_reg remains zero by the time
the destination / source register pointer gets calculated. Don't fully
undo that commit though, but instead just correct the register pointer,
and don't use dst.val as input for mul and imul (div and idiv did avoid
that already).

Reported-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Tested-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2016-09-30 09:52:52 +02:00
Tamas K Lengyel eabe1c39d1 vm_event: Implement ARM SMC events
The ARM SMC instructions are already configured to trap to Xen by default. In
this patch we allow a user-space process in a privileged domain to receive
notification of when such event happens through the vm_event subsystem by
introducing the PRIVILEGED_CALL type.

The intended use-case for this feature is for a monitor application to be able
insert tap-points into the domU kernel-code. For this task only unconditional
SMC instruction should be used.

Signed-off-by: Tamas K Lengyel <tamas.lengyel@zentific.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Razvan Cojocaru <rcojocaru@bitdefender.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2016-09-29 11:19:20 -07:00
Paul Lai fb8be95ca0 x86: altp2m cleanup work
Indent goto labels by one space.
Inline (header) altp2m functions.
In do_altp2m_op(), during the sanity check of the passed command,
return -EOPNOTSUPP if not a valid command.
In do_altp2m_op(), when evaluating a command, ASSERT_UNREACHABLE()
if the command is not recognizable.  The sanity check above should
have triggered the return of -EOPNOTSUPP.
Make hvm_funcs.altp2m_supported "bool" instead of "bool_t".
Make hvm_altp2m_supported() and altp2m_vcpu_emulate_ve() return
bool (rather than return void()).

Signed-off-by: Paul Lai <paul.c.lai@intel.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-09-29 12:05:06 +02:00
Jan Beulich e3b002f842 x86emul: add EVEX decoding
This way we can at least size (and e.g. skip) them if needed, and we
also won't raise the wrong fault due to not having read all relevant
bytes.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-09-29 12:04:33 +02:00
Jan Beulich f09902c456 x86emul: add XOP decoding
This way we can at least size (and e.g. skip) them if needed, and we
also won't raise the wrong fault due to not having read all relevant
bytes.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-09-29 12:04:05 +02:00
Jan Beulich 93ff47cf9f x86emul: complete decoding of two-byte instructions
This way we can at least size (and e.g. skip) them if needed, and we
also won't raise the wrong fault due to not having read all relevant
bytes.

This at once adds correct raising of #UD for the three "ud<n>" flavors
(Intel names only "ud2", but AMD names all three of them in their
opcode maps), as that may make a difference to callers compared to
getting back X86EMUL_UNHANDLEABLE.

Note on opcodes 0FA6 and 0FA7: These are VIA's PadLock instructions,
which have a ModRM like byte where only register forms are valid. I.e.
we could also use SrcImmByte there, but ModRM is more likely to be
correct for a hypothetical extension allowing non-register operations.

Note on opcode 0FB8: I think we're safe to ignore the Itanium specific
JMPE (which doesn't take a ModRM byte, but an immediate).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-09-29 12:03:12 +02:00
Jan Beulich 0552a8cfda x86emul: track only rIP in emulator state
Now that all decoding happens in x86_decode() there's no need to keep
the local registers copy in struct x86_emulate_state. Only rIP gets
updated in the decode phase, so only that register needs tracking
there. All other (read-only) registers can be read from the original
structure (but sadly, due to it getting passed to decode_register(),
the pointer can't be made point to "const" to make the compiler help
ensure no modification happens).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-09-29 12:02:39 +02:00
Jan Beulich 042756fe01 x86emul: fetch all insn bytes during the decode phase
This way we can offer to callers the service of just sizing
instructions, and we also can better guarantee not to raise the wrong
fault due to not having read all relevant bytes.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-09-29 12:02:15 +02:00
Jan Beulich 65e4f6c071 x86emul: split instruction decoding from execution
This is only the mechanical part, a subsequent patch will make non-
mechanical adjustments to actually do all decoding in this new
function.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-09-29 12:01:37 +02:00
Tamas K Lengyel a6f681cf11 arm/mem_access: don't reinject stage 2 access exceptions
The only way a guest may trip with stage 2 access violation is if mem_access is
or was in-use, so reinjecting these exceptions to the guest is never required.

Requested-by: Julien Grall <julien.grall@arm.com>
Signed-off-by: Tamas K Lengyel <tamas.lengyel@zentific.com>
Signed-off-by: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Julien Grall <julien.grall@arm.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
2016-09-28 16:26:59 -07:00
Wei Liu a6c5e71346 libxc: use PRI_xen_pfn in xc_dom_load_acpi
This fixes compilation on ARM.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2016-09-28 23:24:28 +01:00
Wei Liu d7c34a18a9 libxc: fix out of range shift in populate_acpi_pages
unsigned int is only 4-byte long and "4" is treated as int. The shift
would overflow.

Use unsigned long type, calculate the bits to shift before shifting
instead of shifting twice.

Caught by clang compilation test.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
2016-09-28 16:51:50 +01:00
Dario Faggioli 9ef164f8b9 libxc: improve error handling of xc Credit1 and Credit2 helpers
In fact, libxc wrappers should, on error, set errno and
return -1.

Signed-off-by: Dario Faggioli <dario.faggioli@citrix.com>

Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-28 16:05:01 +01:00
Dario Faggioli 96bffd3a91 xen: libxc: allow to set the ratelimit value online
The main purpose of the patch is to provide the xen-libxc
plumbing necessary to be able to change the value of the
ratelimit_us parameter online, for Credit2 (like it is
already for Credit1).

While there:
 - mention in the Xen logs when rate limiting was enables
   and is being disabled (and vice-versa);
 - fix csched2_sys_cntl() which was always returning
   -EINVAL in the XEN_SYSCTL_SCHEDOP_putinfo case.

And also:
 - fix style of an if in csched_sys_cntl();
 - fix the style of the switch in csched2_sys_cntl();

Signed-off-by: Dario Faggioli <dario.faggioli@citrix.com>
Reviewed-by: George Dunlap <george.dunlap@citrix.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-28 16:05:01 +01:00
Boris Ostrovsky b4ab702d5c libxc/xc_dom_core: Copy ACPI tables to guest space
Load ACPI modules into guest space

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky 14c0d328da libxl/acpi: Build ACPI tables for HVMlite guests
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky f14e5cda42 libxl: Initialize domain build info before calling libxl__domain_make
libxl__domain_make() may want to use b_info so we should set defaults
a little earlier.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky 008eeb6be2 libxl/pvhv2: Include APIC page in MMIO hole for PVHv2 guests
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky e07df55a6b libxl/acpi: Add ACPI e820 entry
Add entry for ACPI tables created for PVHv2 guests to e820 map.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky b3afc0a390 libxc/libxl: Allow multiple ACPI modules
Provide ability to load multiple ACPI modules. Thie feature is needed
by PVHv2 guests and will be used in subsequent patches.

We assume that PVHv2 guests do not load their ACPI modules specified
in the configuration file. We can extend support for that in the future
if desired.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky e9a8dc050f libacpi: Build DSDT for PVH guests
PVH guests require DSDT with only ACPI INFO (Xen-specific) and Processor
objects. We separate ASL's ACPI INFO definition into dsdt_acpi_info.asl so
that it can be included in ASLs for both HVM and PVH2.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky 85c17cbb25 x86: Allow LAPIC-only emulation_flags for HVM guests
PVHv2 guests may request LAPIC emulation (and nothing else)

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky 73b72736e6 acpi: Move ACPI code to tools/libacpi
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky 7fe907f2eb acpi/hvmloader: Include file/paths adjustments
In prepearation to moving acpi sources into generally available
libacpi:

1. Pass IOAPIC/LAPIC/PCI mask values via struct acpi_config
2. Modify include files search paths to point to acpi directory
3. Macro-ise include file for build.c that defines various
   utilities used by that file. Users of libacpi will be expected
   to define this macro when compiling build.c

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky 09de18fc88 acpi/hvmloader: Link ACPI object files directly
ACPI sources will be available to various component which will build
them according to their own rules. ACPI's Makefile will only generate
necessary source files.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky 999fb168a8 acpi/hvmloader: Translate all addresses when assigning addresses in ACPI tables
Non-hvmloader users may be building tables in virtual address space
and therefore we need to make sure that values that end up in tables
are physical addresses.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky 9635a512c6 acpi/hvmloader: Replace mem_alloc() and virt_to_phys() with memory ops
Components that wish to use ACPI builder will need to provide their own
mem_alloc() and virt_to_phys() routines. Pointers to these routines will
be passed to the builder as memory ops.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky b48814f20b acpi/hvmloader: Build WAET optionally
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky c6f9a86750 acpi/hvmloader: Make providing IOAPIC in MADT optional
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky 76903b836e acpi/hvmloader: Set TIS header address in hvmloader
Users other than hvmloader may provide TIS address as virtual.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:32:05 +01:00
Boris Ostrovsky c91bc2bf1f acpi/hvmloader: Collect processor and NUMA info in hvmloader
No need for ACPI code to rely on hvm_info variable.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:32:04 +01:00
Boris Ostrovsky 68823df358 acpi: Re-license ACPI builder files from GPLv2 to LGPLv2.1
ACPI builder is currently distributed under GPLv2 license.

We plan to make the builder available to components other than the
hvmloader (which is also GPLv2). Some of these components (such as
libxl) may be distributed under LGPL-2.1 so that they can be used by
non-GPLv2 callers.  But this will not be possible if we incorporate
the ACPI builder in those other components.

To avoid this problem we are relicensing sources in ACPI bulder
directory to the Lesser GNU Public License (LGPL) version 2.1

gpl/mk_dsdt_asl.sh file will remain GPL-only pending permission to
relicense from Lenovo due to commit 801d469ad ("[HVM] ACPI support
patch 3 of 4: ACPI _PRT table."))

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Daniel Kiper <dkiper@net-space.pl>
Acked-by: Stefan Berger <stefanb@us.ibm.com>
Acked-by: Kouya Shimura <kouya@jp.fujitsu.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Keir Fraser <keir@xen.org>
Acked-by: Simon Horman <horms@verge.net.au>
Acked-by: Lars Kurth <lars.kurth@citrix.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Acked-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> [for Oracle, VirtualIron and Sun contributions]
2016-09-28 14:32:04 +01:00
Boris Ostrovsky c3397311a6 acpi: Prevent GPL-only code from seeping into non-GPL binaries
Some code (specifically, introduced by commit 801d469ad ("[HVM] ACPI
support patch 3 of 4: ACPI _PRT table.")) has only been licensed under
GPLv2. We want to prevent this code from showing up in non-GPL
binaries which might become possible after we make ACPI builder code
available to users other than hvmloader.

There are two pieces that we need to be careful about:
(1) A small chunk of code in dsdt.asl that implements _PIC method
(2) A chunk of ASL generator in mk_dsdt.c that describes with PCI
    interrupt routing.

This code will now be generated by a GPL-only script which will be
invoked only when ACPI builder's Makefile is called with GPL variable
set.

We also strip license header from generated ASL files to prevent
inadverent use of those files with incorrect license.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:31:49 +01:00
Boris Ostrovsky e8c4e3af73 acpi: Extract acpi info description into a separate ASL file
This code will be needed by PVH guests who don't want to use full DSDT.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-09-28 14:30:38 +01:00
Wei Liu da9207c864 Config.mk: update mini-os commit
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
2016-09-28 12:12:13 +01:00
Juergen Gross 61997d867f pvgrub: use printk() instead of grub_printf()
grub_printf() is supporting only a very limited number of formats.
Especially some error messages suffer from that, e.g. %lx won't work.
Switch to use printk() for error messages instead.

Signed-off-by: Juergen Gross <jgross@suse.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-28 11:29:28 +01:00
Juergen Gross 9714f6b87e pvgrub: fix crash when booting kernel with p2m list outside kernel mapping
When trying to boot a kernel with the p2m list not mapped by the
initial kernel mapping it can happen that pvgrub is failing as it is
keeping some page tables mapped.

Unmap the additional page tables created for the special p2m mapping
will avoid this failure.

Reported-by: Sven Koehler <sven.koehler@gmail.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-09-28 11:29:28 +01:00
Konrad Rzeszutek Wilk 0297e84a73 livepatch: arm[32,64],x86: NOP test-case
The test-case is quite simple - we NOP the 'xen_minor_version'.
The amount of NOPs depends on the architecture.

On x86 the function is 11 bytes long:

   55                      push   %rbp      <- NOP
   48 89 e5                mov    %rsp,%rbp <- NOP
   b8 04 00 00 00          mov    $0x4,%eax <- NOP
   5d                      pop    %rbp      <- NOP
   c3                      retq

We can NOP everything but the last instruction (so 10 bytes).

On ARM64 its 8 bytes:

  52800100    mov w0, #0x8         <- NOP
  d65f03c0    ret

We can NOP the first instruction.

While on ARM32 there are 24 bytes:

  e52db004        push    {fp}       <- NOP
  e28db000        add     fp, sp, #0 <- NOP
  e3a00008        mov     r0, #8     <- NOP
  e24bd000        sub     sp, fp, #0 <- NOP
  e49db004        pop     {fp}       <- NOP
  e12fff1e        bx      lr

And we can NOP instructions 1 through 5.

Granted this code may be different per compiler!

Hence if anybody does run this test-case - they should
verify that the assumptions made here are correct.

Acked-by: Julien Grall <julien.grall@arm.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2016-09-27 22:07:12 -04:00