Commit Graph
45 Commits
Author SHA1 Message Date
Oleksii Kurochko 56a9e44e7d xen: asm-generic support
Some headers are shared between individual architectures or are empty.
To avoid duplication of these headers, asm-generic is introduced.

With the following patch, an architecture uses generic headers
mentioned in the file arch/$(ARCH)/include/asm/Makefile

To use a generic header is needed to add to
arch/$(ARCH)/include/asm/Makefile :
	generic-y += <name-of-header-file.h>

For each mentioned header in arch/$(ARCH)/include/asm/Makefile,
the necessary wrapper in arch/$(ARCH)/include/generated/asm will be
generated.

As the base Makefile.asm-generic from Linux kernel was taken.
( 06c2afb862f9da8 "Linux 6.5-rc1" ).

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Anthony PERARD <anthony.perard@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-09-11 09:37:33 +02:00
Oleksii Kurochko 22e71609ad xen/riscv: introduce decode_cause() stuff
The patch introduces stuff needed to decode a reason of an
exception.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
2023-08-14 10:02:15 +02:00
Oleksii Kurochko 86bd2484f3 xen/riscv: introduce <asm/bug.h>
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-08-14 10:01:52 +02:00
Oleksii Kurochko 603a24573a xen/riscv: introduce temporary printk stuff
The patch introdcuces printk related stuff which should be deleted
after Xen common code will be available.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
2023-08-14 10:00:53 +02:00
Oleksii Kurochko 8bf52f9d83 xen/riscv: add SPDX tag to config.h
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-07-19 10:22:09 +02:00
Oleksii Kurochko 9b0fc8eeb2 xen/riscv: move extern of cpu0_boot_stack to header
Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-07-05 08:19:34 +02:00
Oleksii Kurochko afb775d3e5 xen/riscv: add SPDX tags
Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-07-05 08:18:46 +02:00
Oleksii Kurochko 3a07da55e6 xen/riscv: introduce reset_stack() function
The reason for reset_stack() introduction is that stack should be
reset twice:
1. Before jumping to C world at the start of _start() function.
2. After jumping from 1:1 mapping world.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-06-19 15:47:37 +02:00
Oleksii Kurochko 652ccd1f4a xen/riscv: add .sbss section to .bss
Sometimes variables are located in .sbss section but it won't
be mapped after MMU will be enabled.
To avoid MMU failures .sbss should be mapped

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
2023-06-19 15:47:23 +02:00
Oleksii Kurochko 7d5e58730d xen/riscv: add __ASSEMBLY__ guard to asm/page.h
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
2023-06-13 11:13:06 +02:00
Oleksii Kurochko 0f80a46ffa xen/riscv: remove dummy_bss variable
After introduction of initial pagetables there is no any sense
in dummy_bss variable as bss section will not be empty anymore.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Bobby Eshleman <bobbyeshleman@gmail.com>
2023-05-31 12:00:13 +02:00
Oleksii Kurochko 0d74fc2b2f xen/riscv: setup initial pagetables
The patch does two thing:
1. Setup initial pagetables.
2. Enable MMU which end up with code in
   cont_after_mmu_is_enabled()

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Bobby Eshleman <bobbyeshleman@gmail.com>
2023-05-31 12:00:05 +02:00
Oleksii Kurochko ec337ce2e9 xen/riscv: align __bss_start
bss clear cycle requires proper alignment of __bss_start.

ALIGN(PAGE_SIZE) before "*(.bss.page_aligned)" in xen.lds.S
was removed as any contribution to "*(.bss.page_aligned)" have to
specify proper aligntment themselves.

Fixes: cfa0409f7c ("xen/riscv: initialize .bss section")
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Bobby Eshleman <bobbyeshleman@gmail.com>
2023-05-31 11:59:53 +02:00
Oleksii Kurochko e66003e7be xen/riscv: introduce setup_initial_pages
The idea was taken from xvisor but the following changes
were done:
* Use only a minimal part of the code enough to enable MMU
* rename {_}setup_initial_pagetables functions
* add an argument for setup_initial_mapping to have
  an opportunity to make set PTE flags.
* update setup_initial_pagetables function to map sections
  with correct PTE flags.
* Rewrite enable_mmu() to C.
* map linker addresses range to load addresses range without
  1:1 mapping. It will be 1:1 only in case when
  load_start_addr is equal to linker_start_addr.
* add safety checks such as:
  * Xen size is less than page size
  * linker addresses range doesn't overlap load addresses
    range
* Rework macros {THIRD,SECOND,FIRST,ZEROETH}_{SHIFT,MASK}
* change PTE_LEAF_DEFAULT to RW instead of RWX.
* Remove phys_offset as it is not used now
* Remove alignment  of {map, pa}_start &= XEN_PT_LEVEL_MAP_MASK(0);
  in  setup_inital_mapping() as they should be already aligned.
  Make a check that {map_pa}_start are aligned.
* Remove clear_pagetables() as initial pagetables will be
  zeroed during bss initialization
* Remove __attribute__((section(".entry")) for setup_initial_pagetables()
  as there is no such section in xen.lds.S
* Update the argument of pte_is_valid() to "const pte_t *p"
* Add check that Xen's load address is aligned at 4k boundary
* Refactor setup_initial_pagetables() so it is mapping linker
  address range to load address range. After setup needed
  permissions for specific section ( such as .text, .rodata, etc )
  otherwise RW permission will be set by default.
* Add function to check that requested SATP_MODE is supported

Origin: git@github.com:xvisor/xvisor.git 9be2fdd7
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Bobby Eshleman <bobbyeshleman@gmail.com>
2023-05-31 11:58:31 +02:00
Oleksii Kurochko efadb18dd5 xen/riscv: add VM space layout
Also it was added explanation about ignoring of top VA bits

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Bobby Eshleman <bobbyeshleman@gmail.com>
2023-05-31 11:55:46 +02:00
Oleksii Kurochko 3146c0f101 xen/riscv: add explicit check that .got{.plt} is empty
The GOT sections usage should be avoided in the hypervisor
so to catch such use cases earlier when GOT things are
produced the patch introduces .got and .got.plt sections
and adds asserts that they're empty.

The sections won't be created until they remain
empty otherwise the asserts would cause early failure.

Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
2023-04-18 08:25:50 +02:00
Oleksii Kurochko c57cd4d45c xen/riscv: add EMBEDDED_EXTRA_CFLAGS to CFLAGS
The patch is needed to keep all address of cpu0_boot_stack
PC-relative.

Pseudoinstruction 'la' can be transformed to 'auipc/addi' or
'auipc/l{w|d}'. It depends on the .option directive: nopic and pic
or compiler flags.

Right now, 'la' transforms to 'auipc/l{w|d}', which in case of
cpu0_boot_stack[] will lead to the usage of _GLOBAL_OFFSET_TABLE_
where all addresses will be without counting that it might happen
that linker address != load address ( so addresses inside got
sections will be relative to linker time ).

It happens becuase the compiler from riscv64 docker compiled with
--enable-default-pie:
  [user@49295ae49cbe build]$ riscv64-linux-gnu-gcc -v
  Using built-in specs.
  COLLECT_GCC=riscv64-linux-gnu-gcc
  COLLECT_LTO_WRAPPER=/usr/lib/gcc/riscv64-linux-gnu/12.2.0/lto-wrapper
  Target: riscv64-linux-gnu
  Configured with: /build/riscv64-linux-gnu-gcc/src/gcc-12.2.0/configure
  --prefix=/usr --program-prefix=riscv64-linux-gnu- --with-local-
  prefix=/usr/riscv64-linux-gnu --with-sysroot=/usr/riscv64-linux-gnu --
  with-build-sysroot=/usr/riscv64-linux-gnu --libdir=/usr/lib --
  libexecdir=/usr/lib --target=riscv64-linux-gnu --host=x86_64-pc-linux-
  gnu --build=x86_64-pc-linux-gnu --with-system-zlib --with-isl --with-
  linker-hash-style=gnu --disable-nls --disable-libunwind-exceptions --
  disable-libstdcxx-pch --disable-libssp --disable-multilib --disable-
  werror --enable-languages=c,c++ --enable-shared --enable-threads=posix
  --enable-__cxa_atexit --enable-clocale=gnu --enable-gnu-unique-object -
  -enable-linker-build-id --enable-lto --enable-plugin --enable-install-
  libiberty --enable-gnu-indirect-function --enable-default-pie --enable-
  checking=release
  Thread model: posix
  Supported LTO compression algorithms: zlib zstd
  gcc version 12.2.0 (GCC)

Looking at gcc spec file for the RISC-V architecture:
  [user@49295ae49cbe build]$ riscv64-linux-gnu-gcc -dumpspecs | grep -i
  pic
  --traditional-format %(subtarget_asm_debugging_spec) %{fno-pie|fno-
  PIE|fno-pic|fno-PIC:;:-fpic} %{march=*} %{mabi=*} %{mno-relax} %{mbig-
  endian} %{mlittle-endian} %(subtarget_asm_spec)%{misa-spec=*}
which means that -fpic is enabled if none of the following options are
present on the command line:
    -fno-pie
    -fno-PIE
    -fno-pic
    -fno-PIC

That's the reasons why 'la' is transformed to 'aupic/l{w|d} GOT' and
not be dependent on the toolchain used.

Suggested-by: Jan Beulich <jbeulich@suse.com>
Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
2023-04-18 08:22:20 +02:00
Oleksii Kurochko 720ebfbad3 xen/x86: switch to use generic implemetation of bug.h
The following changes were made:
* Make GENERIC_BUG_FRAME mandatory for X86
* Update asm/bug.h using generic implementation in <xen/bug.h>
* Update do_invalid_op using generic do_bug_frame()
* Define BUG_DEBUGGER_TRAP_FATAL to debugger_trap_fatal(X86_EXC_GP,regs)
* type of eip variable was changed to 'const void *'

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2023-04-03 12:53:29 +02:00
Oleksii Kurochko 71efa7b868 xen: change <asm/bug.h> to <xen/bug.h>
The idea of the patch is to change all <asm/bug.h> to <xen/bug.h> and
keep Xen compilable with adding only minimal amount of changes:
1. It was added "#include <xen/types.h>" to ARM's "<asm/bug.h>" as it
  uses uint_{16,32}t in 'struct bug_frame'.
2. It was added '#define BUG_FRAME_STRUCT' which means that ARM hasn't
  been switched to generic implementation yet.
3. It was added '#define BUG_FRAME_STRUCT' which means that x86 hasn't
  been switched to generic implementation yet.
4. BUGFRAME_* and _start_bug_frame[], _stop_bug_frame_*[] were removed
  for ARM & x86 to deal with compilation errors such as:
      redundant redeclaration of ...
5. Remove BUG_DISP_WIDTH, BUG_LINE_LO_WIDTH, BUG_LINE_HI_WIDTH from
  x86's <asm.bug.h> to not to produce #undef for them and #define again
  with the same values as in <xen/bug.h>. These #undef and #define will
  be anyway removed in the patch [2]
6. Remove <asm/bug.h> from <x86/acpi/cpufreq/cpufreq.c> and
  <drivers/cpufreq/cpufreq.c> as nothing from <xen/bug.h> are used in
  <*/cpufreq.c>

In the following two patches x86 and ARM archictectures will be
switched fully:
[1] xen/arm: switch ARM to use generic implementation of bug.h
[2] xen/x86: switch x86 to use generic implemetation of bug.h

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Julien Grall <jgrall@amazon.com>
2023-04-03 12:52:02 +02:00
Oleksii Kurochko faafb5cb73 xen/arm: remove unused defines in <asm/bug.h>
The following defines BUG_DISP_WIDTH, BUG_LINE_LO_WIDTH,
BUG_LINE_HI_WIDTH aren't used in ARM so could be purged
as unused.

Requested-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Julien Grall <jgrall@amazon.com>
2023-04-03 12:50:56 +02:00
Oleksii Kurochko 60a9b07150 xen: introduce CONFIG_GENERIC_BUG_FRAME
A large part of the content of the bug.h is repeated among all
architectures, so it was decided to create a new config
CONFIG_GENERIC_BUG_FRAME.

The version of <bug.h> from x86 was taken as the base version.

The patch introduces the following stuff:
  * common bug.h header
  * generic implementation of do_bug_frame
  * new config CONFIG_GENERIC_BUG_FRAME

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Tested-by: Julien Grall <jgrall@amazon.com>
Acked-by: Julien Grall <jgrall@amazon.com>
2023-04-03 12:50:06 +02:00
Oleksii Kurochko cfa0409f7c xen/riscv: initialize .bss section
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Bobby Eshleman <bobbyeshleman@gmail.com>
2023-03-20 17:12:04 +01:00
Oleksii Kurochko 537ed7a41b xen/riscv: read/save hart_id and dtb_base passed by bootloader
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Bobby Eshleman <bobbyeshleman@gmail.com>
2023-03-20 17:11:13 +01:00
Oleksii Kurochko d1e6767459 xen/riscv: disable fpu
Disable FPU to detect illegal usage of floating point in kernel
space.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Bobby Eshleman <bobbyeshleman@gmail.com>
2023-03-20 17:10:34 +01:00
Oleksii Kurochko 380a8c0c65 xen/arm: Ensure the start *(.proc.info) of is 4-byte aligned
The entries in *(.proc.info) are expected to be 4-byte aligned and the
compiler will access them using 4-byte load instructions. On Arm32, the
alignment is strictly enforced by the processor and will result to a data
abort if it is not correct.

However, the linker script doesn't encode this requirement. So we are at
the mercy of the compiler/linker to have padded the previous sections
suitably.

This was spotted when trying to use the upcoming generic bug
infrastructure with the compiler provided by Yocto.

Link: https://lore.kernel.org/xen-devel/6735859208c6dcb7320f89664ae298005f70827b.camel@gmail.com/
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Julien Grall <jgrall@amazon.com>
2023-03-02 14:48:12 +00:00
Oleksii Kurochko e16f103d69 xen/riscv: mask all interrupts
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-13 10:05:39 +01:00
Oleksii Kurochko 72c9ea1f88 xen/riscv: introduce exception handlers implementation
The patch introduces an implementation of basic exception handlers:
- to save/restore context
- to handle an exception itself. The handler calls wait_for_interrupt
  now, nothing more.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-13 10:04:48 +01:00
Oleksii Kurochko 35f867133f xen/riscv: introduce exception context
The patch introduces a set of registers which should be saved to and
restored from a stack after an exception occurs and a set of defines
which will be used during exception context saving/restoring.

Originally <asm/processor.h> header was introduced in the patch series
from Bobby so partially it was
re-used and the following changes were done:
  - Move all RISCV_CPU_USER_REGS_* to asm/asm-offsets.c
  - Remove RISCV_CPU_USER_REGS_OFFSET & RISCV_CPU_USER_REGS_SIZE as
    there is no sense in them after RISCV_CPU_USER_REGS_* were moved to
    asm/asm-offsets.c
  - Remove RISCV_PCPUINFO_* as they aren't needed for current status of
    the RISC-V port
  - register_t renamed to unsigned long
  - rename wait_for_interrupt to wfi

Signed-off-by: Bobby Eshleman <bobby.eshleman@gmail.com>
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-09 11:15:18 +01:00
Oleksii Kurochko bd960d6128 xen/riscv: add <asm/csr.h> header
The following changes were made in comparison with <asm/csr.h> from
Linux:
  * remove all defines as they are defined in riscv_encoding.h
  * leave only csr_* macros

Origin: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/ d2d11f342b17
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-09 11:15:08 +01:00
Oleksii Kurochko 2b38576556 xen/riscv: add <asm/asm.h> header
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-09 11:14:53 +01:00
Oleksii Kurochko 7174971f5f automation: add RISC-V smoke test
Add check if there is a message 'Hello from C env' presents
in log file to be sure that stack is set and C part of early printk
is working.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-09 11:14:40 +01:00
Oleksii Kurochko 46a78347e2 xen/riscv: introduce early_printk basic stuff
Because printk() relies on a serial driver (like the ns16550 driver)
and drivers require working virtual memory (ioremap()) there is not
print functionality early in Xen boot.

The patch introduces the basic stuff of early_printk functionality
which will be enough to print 'hello from C environment".

Originally early_printk.{c,h} was introduced by Bobby Eshleman
(https://github.com/glg-rv/xen/commit/a3c9916bbdff7ad6030055bbee7e53d1aab71384)
but some functionality was changed:
early_printk() function was changed in comparison with the original as
common isn't being built now so there is no vscnprintf.

This commit adds early printk implementation built on the putc SBI call.

As sbi_console_putchar() is already being planned for deprecation
it is used temporarily now and will be removed or reworked after
real uart will be ready.

Signed-off-by: Bobby Eshleman <bobby.eshleman@gmail.com>
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Bobby Eshleman <bobby.eshleman@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-09 11:13:50 +01:00
Oleksii Kurochko 826b270337 xen/riscv: introduce empty <asm/cache.h>
To include <xen/lib.h> <asm/cache.h> is required

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-08 09:20:39 +01:00
Oleksii Kurochko a49cf4fb61 xen/riscv: introduce empty <asm/string.h>
To include <xen/lib.h> <asm/string.h> is required

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-08 09:20:37 +01:00
Oleksii Kurochko aa492912a6 xen/riscv: add <asm/riscv_encoding.h header
The following changes were done in Xen code base in comparison with OpenSBI:
  * Remove "#include <sbi/sbi_const.h>" as most of the stuff inside
    it is present in Xen code base.
  * Add macros _UL and _ULL as they were in <sbi/sbi_const.h> before
  * Add SATP32_MODE_SHIFT/SATP64_MODE_SHIFT/SATP_MODE_SHIFT as they will
    be used in riscv/mm.c
  * Add CAUSE_IRQ_FLAG which is going to be used insised exception
    handler
  * Change ulong to unsigned long in macros REG_PTR(...)
  * Change s32 to int32_t

Originally authored by Anup Patel <anup.patel@wdc.com>

Origin: https://github.com/riscv-software-src/opensbi.git c45992cc2b12
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-08 09:20:35 +01:00
Oleksii Kurochko 48aabc5de2 xen/riscv: change ISA to r64G
Work with some registers requires csr command which is part of
Zicsr.

Also ISA was changed from r64ima to r64g where G is represented the
“IMAFDZicsr Zifencei” base and extensions so basically it is the same
as it was before plus additional extensions we will need in the
nearest future.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-02-08 09:20:33 +01:00
Oleksii Kurochko 87ee7a817d automation: rename RISCV_64 container and jobs
All RISCV_64-related stuff was renamed to be consistent with
ARM (arm32 is cross build as RISCV_64).

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Signed-off-by: Stefano Stabellini <stefano.stabellini@amd.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2023-01-24 14:32:10 -08:00
Oleksii Kurochko 0c9c951e6f xen/riscv: introduce asm/types.h header file
Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2023-01-20 09:25:44 +01:00
Oleksii Kurochko ee8c636dd4 xen/include: change <asm/types.h> to <xen/types.h> in early_printk.h
In the patch "include/types: move stddef.h-kind types to common
header" [1] size_t was moved from <asm/types.h> to <xen/types.h>
so early_printk should be updated correspondingly.

[1] https://lore.kernel.org/xen-devel/5a0a9e2a-c116-21b5-8081-db75fe4178d7@suse.com/

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2023-01-20 09:24:20 +01:00
Oleksii Kurochko 83d9679db0 xen/riscv: introduce stack stuff
The patch introduces and sets up a stack in order to go to C environment

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2023-01-11 23:46:12 +00:00
Oleksii Kurochko 692d04a9ca automation: add qemu-system-riscv to riscv64.dockerfile
qemu-system-riscv will be used to run RISC-V Xen binary and
gather logs for smoke tests.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2023-01-09 17:22:47 +00:00
Oleksii Kurochko da95e36975 automation: temporarily disable CONFIG_COVERAGE for RISC-V randconfig jobs
As common isn't built for RISC-V architecture now, accordingly,
common/coverage (where __gconv_* function are defined) isn't built either
but randconfig may decide to enable CONFIG_COVERAGE which will lead to
the following compilation error:

riscv64-linux-gnu-ld: prelink.o: in function `.L0 ':
arch/riscv/early_printk.c:(.text+0x18):
    undefined reference to `__gcov_init'
riscv64-linux-gnu-ld: arch/riscv/early_printk.c:(.text+0x40):
    undefined reference to `__gcov_exit'

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2023-01-09 17:20:19 +00:00
Oleksii Kurochko 38525f6f73 xen/include: include <asm/types.h> in <xen/early_printk.h>
<asm/types.h> should be included because second argument of
early_puts has type 'size_t' which is defined in <asm/types.h>

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Julien Grall <jgrall@amazon.com>
2023-01-09 14:29:49 +01:00
Oleksii Kurochko 2b21cbbb33 automation: Add RISC-V 64 cross-build tests for Xen
Add build jobs to cross-compile Xen-only for RISC-V 64.

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2023-01-05 16:35:55 +00:00
Oleksii Kurochko bb62c25e3e xen/riscv: Initial RISC-V support to build/run minimal Xen
The patch provides a minimal amount of changes to start
build and run minimal Xen binary at GitLab CI&CD that will
allow continuous checking of the build status of RISC-V Xen.

Except introduction of new files the following changes were done:
* Redefinition of ALIGN define from '.align 2' to '.align 4', as 2 was
  incorrect choice done previously.
* ALL_OBJ-y and ALL_LIBS-y were temporary overwritted to produce
  a minimal hypervisor image otherwise it will be required to push
  huge amount of headers and stubs for common, drivers, libs etc which
  aren't necessary for now.
* Section changed from .text to .text.header for start function
  to make it the first one executed.
* Rework riscv64/Makefile logic to rebase over changes since the first
  RISC-V commit.

RISC-V Xen can be built by the following instructions:
  $ CONTAINER=riscv64 ./automation/scripts/containerize \
       make XEN_TARGET_ARCH=riscv64 -C xen tiny64_defconfig
  $ CONTAINER=riscv64 ./automation/scripts/containerize \
       make XEN_TARGET_ARCH=riscv64 -C xen build

Signed-off-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2023-01-05 16:35:55 +00:00