Commit Graph
35140 Commits
Author SHA1 Message Date
Andrew Cooper 747ddf0dda x86/pagewalk: Use pointer syntax for pfec parameter
It is a pointer, not an array.

No functional change.

Requested-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: George Dunlap <george.dunlap@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
2017-03-23 17:25:45 +00:00
Andrew Cooper 954b98ed5c x86/cpuid: Sort cpu_has_* predicates by feature number
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2017-03-23 17:25:44 +00:00
Andrew Cooper d6a6b3918b x86/viridian: annotate intentional fallthrough
This stops Coverity complaining.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2017-03-23 15:53:37 +01:00
Jan Beulich c2e13371ac arch: drop ALIGN_STR
... as being unused and having been unusable: It was clearly intended
for use in asm(), yet was placed inside __ASSEMBLY__ conditionals.

Also drop __ALIGN{,_STR} - there's no need to have a second flavor of
these constructs with no difference in behavior.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Julien Grall <julien.grall@arm.com>
2017-03-23 15:53:02 +01:00
Paul Durrant 9c4555801f x86/viridian: implement the crash MSRs
Section 2.4.4 of the Hypervisor Top Level Functional Specification states
that enabling bit 10 in EDX of CPUID leaf 3 advertises to Windows a set
of MSRs into which it can write crash information.

This patch advertises that bit and implements the MSRs such that Xen can
log the information if a Windows guest crashes.

Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
2017-03-23 15:52:08 +01:00
Paul Durrant bf13fe76c5 x86/viridian: make the threshold for HvNotifyLongSpinWait tunable
The current threshold before the guest issues the hypercall is, and always
has been, hard-coded to 2047. It is not clear where this number came
from so, to at least allow for ease of experimentation, this patch makes
the threshold tunable via the Xen command line.

Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2017-03-23 15:51:45 +01:00
Paul Durrant 422db534e8 x86/viridian: don't put Xen version information in CPUID leaf 2
The Hypervisor Top Level Functional Specification v5.0a states in section
2.5:

"The hypervisor version information is encoded in leaf 0x40000002. Two
version numbers are provided: the main version and the service version.
The main version includes a major and minor version number and a build
number. These correspond to Microsoft Windows release numbers."

It also goes on to advise clients (i.e. guest versions of Windows) to use
the following algorithm to determine compatibility with the hypervisor
enlightenments:

if <your-main-version> greater than <hypervisor-main-version>
{
	your version is compatible
}
else if <your-main-version> equal to <hypervisor-main-version> and
 <your-service-version> greater than or equal to <hypervisor-service-version>
{
	your version is compatible
}
else
{
	your version is NOT compatible
}

So, clearly putting Xen hypervisor version information in that leaf is
spurious, but we probably get away with it because Xen's major version
is lower than the major version of Windows in which Hyper-V first
appeared (Server 2008).

This patch changes the leaf to use the kernel major and minor
versions, and build number from Windows Server 2008 (64-bit) by default.
These default values can be overriden from the Xen command line using new
'viridian-version' parameter.

Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2017-03-23 15:51:14 +01:00
Vitaly Kuznetsov fd9ca53f66 libxl: use libxl__xs_read_checked() instead or raw xs_read() in do_domain_soft_reset()
Replace raw xs_read() calls with libxl__xs_read_checked() and bail on error.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2017-03-23 12:01:47 +00:00
Vitaly Kuznetsov 841e86b8e1 libxl: preserve console tty across soft reset
On soft reset we remove the domain from xenstore and introduce it back to
have everything reconnected. Console, however, stays attached (as xenconsoled
checks if the domain is dying and our domain is not) but we lose the
information about tty:

before soft reset:
   console = ""
    ...
    type = "xenconsoled"
    output = "pty"
    tty = "/dev/pts/1"
    ...

after:
   console = ""
    ...
    type = "xenconsoled"
    output = "pty"
    tty = ""
    ...

The issue applies to both HVM and PVH but for HVM guests serial console
through QEMU is usually in use and for PVH we don't have it.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2017-03-23 12:01:24 +00:00
Zhang Chen ba7a5da15e COLO-proxy: Fix argument check error
Here, we should check the 'outdev' before use.

Signed-off-by: Zhang Chen <zhangchen.fnst@cn.fujitsu.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2017-03-23 12:00:44 +00:00
Andre Przywara 8d95b96da1 ARM: arm64: activate atomic 64-bit accessors
For some reason (probably because there was no user before) the 64-bit
atomic access wrappers were commented out so far.
As we will need them in the next patch, active (and fix) them now.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2017-03-22 15:49:48 -07:00
Vitaly Kuznetsov cfb0cfb27d libxl: don't try to rename dm save file for PVH
Guests with LIBXL_DEVICE_MODEL_VERSION_NONE don't have a device model
running so there is no save file to rename.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2017-03-22 11:28:25 +00:00
Andrew Cooper ee92c92b51 tools/libxc: Drop dombuilder support for PV autotranslate guests
c/s 4045953 "x86/paging: Enforce PG_external == PG_translate == PG_refcounts"
in the hypervisor finally prevented the construction of PV autotranslate
guests.

Remove support for such guests in the domain builder, bailing out with an
obvious "no longer supported" message, rather than a more obscure
"SHADOW_OP_ENABLED failed".

As a piece of cleanup, rename xc_dom_feature_translated() to
xc_dom_translated() to match its actual semantics.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2017-03-22 11:24:20 +00:00
Juergen Gross 670a34bb3e xenstore: add missing checks for allocation failure
Add missing allocation failure checks.

Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
2017-03-22 11:23:14 +00:00
Juergen Gross ec4abec209 xenstore: set correct error code when violating quota
When the number of permitted xenstore entries for a domain is being
exceeded the operation trying to create a new entry is denied.
Unfortunately errno isn't being set in this case so the error code
returned to the client is undefined.

Set errno to ENOSPC in this case.

Signed-off-by: Juergen Gross <jgross@suse.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2017-03-22 11:23:10 +00:00
Paul Durrant 5047677108 x86/viridian: add warnings for unimplemented hypercalls and MSRs
These warnings can be useful when Microsoft updates Windows.

In the past there have been several cases when Windows erroneously uses
hypercalls and MSRs that should be gated on CPUID flags than Xen does
not set. The usual symptom is a guest crash with little or no information
in the hypervisor log. Adding these warnings at least gives a clue as to
what might be happening in such cases.

Some versions of Windows do currently issue hypercalls that they should
not, so this patch whitelists those to avoid the warnings as the lack
of implementation is clearly proved not to be a problem to the guest.

The warnings are rate limited so a malicious guest cannot use them to
as a DoS.

NOTE: Because the MSR warnings need to be gated on range checking the
      MSR address this patch imports the up-to-date definitions of all
      the viridian MSRs from the specification.

Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2017-03-22 12:04:20 +01:00
Paul Durrant 791260bab7 x86/viridian: get rid of the magic numbers in CPUID leaves 1 and 2
The numbers correspond to ASCII characters so just use appropriate
character strings directly.

Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2017-03-22 12:03:54 +01:00
Paul Durrant 4567bf73c1 x86/viridian: fix xen-hvmcrash when vp_assist page is present
Currently use of xen-hvmcrash will cause an immediate domain_crash() in
initialize_vp_assist() because it is called from viridian_load_vcpu_ctxt()
without having first cleared any previous mapping.

This patch addes a check into viridian_load_vcpu_ctxt() to avoid re-
initialization and turned the domain_crash() in initialize_vp_assist()
into an ASSERT() since neither codepath into that function should allow
it to be hit.

Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2017-03-22 12:03:03 +01:00
Ross Lagerwall 0d670cd46c x86/mm: use statically defined locking order
Instead of using a locking order based on line numbers which interacts
poorly with trying to create a live patch, statically define the locking
order.

Signed-off-by: Ross Lagerwall <ross.lagerwall@citrix.com>
Reviewed-by: Dario Faggioli <dario.faggioli@citrix.com>
Acked-by: George Dunlap <george.dunlap@citrix.com>
2017-03-22 12:02:01 +01:00
Ian Jackson 5ca67f7453 QEMU_TAG update 2017-03-21 18:43:44 +00:00
Ian Jackson 03a7c07137 misc/branching-checklist: Call mg-branch-setup in Cambridge too
Signed-off-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
2017-03-21 18:41:03 +00:00
Ian Jackson 3979759c9b misc/release-checklist: Split out branching-checklist.txt
This is almost all just motion.  There is one new paragraph in
branching-checklist.txt:

+ Update both new branches according to release-checklist.txt section re
+ README etc.

Signed-off-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
2017-03-21 18:41:02 +00:00
Ian Jackson 958b30442a misc/release-checklist: Remove pre-4.3 tarball target instructions
4.2 is well out of support and we will never need to make a release of
it again.  Delete all the stuff for making combined tarballs "by hand".

Signed-off-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
2017-03-21 18:41:02 +00:00
Ian Jackson 1c739589f0 misc/release-checklist: Remove clearly-obsolete stuff
Remove:

 - Head comment saying not to edit here.  This came from the
   now-no-longer-master xenbits copy which I have deleted.

 - Many old (commented-out) instruction related to hg

 - Many old (commented-out) instruction related to pre-unified
   qemu trees.

 - Many old (commented-out) instruction related to ancient
   locations within Citrix.

Signed-off-by: Ian Jackson <Ian.Jackson@eu.citrix.com>
2017-03-21 18:41:02 +00:00
Zhongze Liu 27ef1ec55e common: allow a default compiled-in command line using Kconfig
This allows downstreams to set their defaults without modifying the source code
all over the place. Also probably useful for the embedded space.
(See Also: https://xenproject.atlassian.net/browse/XEN-41)

If CMDLINE is set, it will be parsed prior to the bootloader command line.
This order of parsing implies that if any non-cumulative options are set in
both CMDLINE and the bootloader command line, only the ones in the latter will
take effect. Furthermore, if CMDLINE_OVERRIDE is set to y, the whole
bootloader command line will be ignored, which will be useful to work around
broken bootloaders. A wrapper to the original common/kernel.c:cmdline_parse()
was introduced to complete this task.

Signed-off-by: Zhongze Liu <blackskygg@gmail.com>
[jb: fix non-EXPERT build]
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2017-03-21 15:20:30 +01:00
Jan Beulich 0711b59b85 x86emul: correct FPU code/data pointers and opcode handling
Prevent leaking the hypervisor ones (stored by hardware during stub
execution), at once making sure the guest sees correct values there.
This piggybacks on the backout logic used to deal with write faults of
FPU insns.

Deliberately ignore the NO_FPU_SEL feature here: Honoring it would
merely mean extra code with no benefit (once we XRSTOR state, the
selector values will simply be lost anyway).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Paul Durrant <paul.durrant@citrix.com> [hvm/emulate.c]
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2017-03-21 15:13:42 +01:00
Jan Beulich a8fcd80c8f x86emul: correct handling of FPU insns faulting on memory write
When an FPU instruction with a memory destination fails during the
memory write, it should not affect FPU register state. Due to the way
we emulate FPU (and SIMD) instructions, we can only guarantee this by
- backing out changes to the FPU register state in such a case or
- doing a descriptor read and/or page walk up front, perhaps with the
  stubs accessing the actual memory location then.
The latter would require a significant change in how the emulator does
its guest memory accessing, so for now the former variant is being
chosen.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Paul Durrant <paul.durrant@citrix.com> [hvm/emulate.c]
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2017-03-21 15:12:59 +01:00
Jan Beulich 9b7c3fabbc x86emul: centralize put_fpu() invocations
..., splitting parts of it into check_*() macros. This is in
preparation of making ->put_fpu() do further adjustments to register
state. (Some of the check_xmm() invocations could be avoided, as in
some of the cases no insns handled there can actually raise #XM, but I
think we're better off keeping them to avoid later additions of further
insn patterns rendering the lack of the check a bug.)

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2017-03-21 15:10:25 +01:00
Andrew Cooper 69f4633817 tools/insn-fuzz: Support AFL's afl-clang-fast mode
AFL has an alternative llvm-base instrumentation mode, which has much lower
overhead than the traditional afl-gcc.

One extra ability is to chose exactly where the master process gets
initialised to, before being forked for testing.  This point is chosen after
the call to LLVMFuzzerInitialize(), so the stack isn't being remapped
executable for every test.

Another extra ability is to feed multiple inputs into a single test process,
to reduce the number of fork() calls required overall.  Two caveats are that if
stdin is used for data, it must be unbuffered, and if input is passed via a
command line parameter, the underlying file must be opened and closed on each
iteration.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
2017-03-20 16:45:21 +00:00
Andrew Cooper 63092064eb tools/insn-fuzz: Make use of LLVMFuzzerInitialize()
libfuzz can perform one-time initialisation by calling LLVMFuzzerInitialize().
Move emul_test_init() into this, to avoid repeating it on every
LLVMFuzzerTestOneInput() call.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
2017-03-20 16:45:21 +00:00
Andrew Cooper 7dfd103efb tools/insn-fuzz: Accept fuzzing input on stdin
This is rather faster for afl-fuzz to arrange than using an explicit file
parameter.  Also update the README to recommend using a tmpfs for findings_dir
which reduces disk load and is more performant.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
2017-03-20 16:45:20 +00:00
Andrew Cooper 6a6f3ff2c1 tools/insn-fuzz: Use getopt() for parsing the command line
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
2017-03-20 16:45:20 +00:00
Andrew Cooper 1c98756183 tools/insn-fuzz: Use shorter filenames
Amongst other things, these tab complete more easily.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
2017-03-20 16:45:20 +00:00
Andrew Cooper 3a54f72491 tools/fuzz: Include LLVMFuzzerTestOneInput() in the generated .a
Otherwise they are not suitable for use with libfuzz.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
2017-03-20 16:45:20 +00:00
Andrew Cooper 264efe24ff tools/fuzz: Use $(CC) for linking the harnesses
This is necessary to make use of compiler features such as UBSAN.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
2017-03-20 16:45:20 +00:00
Andrew Cooper cde043c55c tools/fuzz: Remove .d files in clean
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
2017-03-20 16:45:20 +00:00
Jan Beulich 8709b10c7f AMD-Vi: allocate root table on demand
This was my originally intended fix for the AMD side of XSA-207:
There's no need to unconditionally allocate the root table, and with
that there's then also no way to leak it when a guest has no devices
assigned.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
2017-03-20 17:00:34 +01:00
Paul Durrant 5f8ce179e2 x86/viridian: update to version 5.0a of the specification
The Hypervisor Top Level Functional Specification v5.0a has many differences
from previous versions and introduces whole new sections.

This patch:

- Updates the URL at the top of the source.
- Fixes up section references accordingly.
- Modifies the MSR naming convention in the code to match the specification.
- Rename the apic_assist page to the vp_assist page to reflect the change
  in the specification.
  (The APIC assist feature itself is inconsistently named in the
  specification so stick wth the current feature name).
- Updates the handling of CPUID leaf 3.

There is one functional change in this patch: The vp_assist page is
mapped (and completely zeroed) regardless of whether the APIC assist
feature is enabled. This reflects its new wider remit and simplifies the
code slightly.

Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2017-03-20 16:59:54 +01:00
Haozhong Zhang 0bf94483e1 x86/mce: add blank lines between non-fall-through switch case blocks
Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2017-03-20 16:59:16 +01:00
Haozhong Zhang e8c437eba5 x86/mce_intel: refine messages of MCA capabilities
... to only print available ones.

Suggested-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2017-03-20 16:58:33 +01:00
Haozhong Zhang 95c2fc5163 x86/mce: switch bool_t/1/0 to bool/true/false
Signed-off-by: Haozhong Zhang <haozhong.zhang@intel.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2017-03-20 16:57:29 +01:00
Wei Liu 2588a12732 x86: remove stale PVHv1 comment from PV domain builder
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2017-03-20 15:39:45 +00:00
Wei Liu a5c0999258 sched.h: remove stale PVHv1 comment
With the removal of PVHv1 this comment is wrong. Just remove it.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2017-03-20 15:39:45 +00:00
Wei Liu 437f0a972c docs: update dmop.markdown
... to match the code after the removal of PVHv1.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2017-03-20 15:39:45 +00:00
Wei Liu 300f06470f x86: clean up header files in dom0_build.c
Remove the ones that are no longer needed and sort them.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2017-03-20 15:39:45 +00:00
Wei Liu 7eb3fc22c7 x86: split PVH dom0 builder to hvm/dom0_build.c
Long term we want to be able to disentangle PV and HVM code. Move
the PVH domain builder to a dedicated file.

Lift function declarations to dom0_build.h and rename them when
necessary.

No functional change.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2017-03-20 15:39:45 +00:00
Wei Liu 674cad0d67 x86: split PV dom0 builder to pv/dom0_builder.c
Long term we want to be able to disentangle PV and HVM code. Move the PV
domain builder to a dedicated file.

This in turn requires exposing a few functions and variables via a new
header dom0_build.h. These functions and variables are now prefixed with
"dom0_" if they weren't already so.

No functional change.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2017-03-20 15:39:45 +00:00
Wei Liu 503b2fb9a7 x86: modify setup_dom0_vcpu to use dom0_cpus internally
We will later move dom0 builders to different directories. To avoid the
need of making dom0_cpus visible outside dom0_builder.c, modify
setup_dom0_vcpus to cycle through dom0_cpus internally instead of
relying on the callers to do that.

No functional change.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2017-03-20 15:39:45 +00:00
Wei Liu d4188929e4 x86: rename domain_build.c to dom0_build.c
To reflect the true nature of this file. No functional change.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2017-03-20 15:39:45 +00:00
Zhang Chen 7c2c1763aa libxl/libxl_qmp.c: Update COLO query replication status API
The QEMU community has asked us to change QMP command
xen-get-replication-error to query-xen-replication-status. Modify Xen
side to use the new name.

Signed-off-by: Zhang Chen <zhangchen.fnst@cn.fujitsu.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2017-03-20 15:27:53 +00:00