Commit Graph
39713 Commits
Author SHA1 Message Date
Andrew Cooper aae639bc53 Revert "x86/shim: Refresh pvshim_defconfig"
This reverts commit 32b1d62887 and its fixup
060f4eee0f, which are still causing build and
test problems.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-09-06 13:33:19 +01:00
Andrew Cooper d2a95f1c3e x86/AMD: Fix handling of x87 exception pointers on Fam17h hardware
AMD Pre-Fam17h CPUs "optimise" {F,}X{SAVE,RSTOR} by not saving/restoring
FOP/FIP/FDP if an x87 exception isn't pending.  This causes an information
leak, CVE-2006-1056, and worked around by several OSes, including Xen.  AMD
Fam17h CPUs no longer have this leak, and advertise so in a CPUID bit.

Introduce the RSTR_FP_ERR_PTRS feature, as specified by AMD, and expose to all
guests by default.  While adjusting libxl's cpuid table, add CLZERO which
looks to have been omitted previously.

Also introduce an X86_BUG bit to trigger the (F)XRSTOR workaround, and set it
on AMD hardware where RSTR_FP_ERR_PTRS is not advertised.  Optimise the
conditions for the workaround paths.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-09-05 19:38:40 +01:00
Andrew Cooper 6408ae3f80 x86/feature: Generalise synth and introduce a bug word
Future changes are going to want to use cpu_bug_* in a mannor similar to
Linux.  Introduce one bug word, and generalise the calculation of
NCAPINTS.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2019-09-05 19:38:40 +01:00
Andrew Cooper 9676360b7a x86/vtd: Drop struct intel_iommu
The sole remaining member of struct intel_iommu is the drhd backpointer.  Move
this into struct vtd_iommu, replacing the the 'intel' pointer.

This removes one dynamic memory allocation per IOMMU on the system.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2019-09-05 11:45:00 +01:00
Andrew Cooper 488eccdd56 x86/vtd: Drop struct iommu_flush
It is unclear why this abstraction exists, but iommu_get_flush() returns
possibly NULL and every user unconditionally dereferences the result.  In
practice, I can't spot a path where iommu is NULL, so I think it is mostly
dead.

Move the two function pointers into struct vtd_iommu (using a flush prefix),
and delete iommu_get_flush().  Furthermore, there is no need to pass the IOMMU
pointer to the callbacks via a void pointer, so change the parameter to be
correctly typed as struct vtd_iommu.  Clean up bool_t to bool in surrounding
context.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2019-09-05 11:44:59 +01:00
Andrew Cooper 1cc8d6fbf4 x86/vtd: Drop struct ir_ctrl
It is unclear why this abstraction exists, but iommu_ir_ctrl() returns
possibly NULL and every user unconditionally dereferences the result.  In
practice, I can't spot a path where iommu is NULL, so I think it is mostly
dead.

Move the fields into struct vtd_iommu, and delete iommu_ir_ctrl().

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2019-09-05 11:26:26 +01:00
Andrew Cooper 8cfc407fba x86/vtd: Drop struct qi_ctrl
It is unclear why this abstraction exists, but iommu_qi_ctrl() returns
possibly NULL and every user unconditionally dereferences the result.  In
practice, I can't spot a path where iommu is NULL, so I think it is mostly
dead.

Move the sole member into struct vtd_iommu, and delete iommu_qi_ctrl().

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2019-09-05 11:26:26 +01:00
Andrew Cooper c697330d60 x86/vtd: Rename struct iommu to vtd_iommu
VT-d's local struct iommu is an overly-generic name, for a structure which in
practice maps 1-to-1 with the real IOMMUs in the system.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2019-09-05 11:26:26 +01:00
Jan Beulich fa8f9792be VT-d/ATS: tidy device_in_domain()
Use appropriate types. Drop unnecessary casts. Check for failures which
can (at least in theory because of non-obvious breakage elsewhere)
occur, instead of ones which really can't (map_domain_page() won't
return NULL).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2019-09-05 10:02:11 +02:00
Juergen Gross 15aa6c6823 x86: remove sched-if.h includes from various sources
xen/sched-if.h is included in multiple sources where it isn't directly
needed. Remove those #include statements.

Suggested-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Juergen Gross <jgross@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-09-05 10:00:36 +02:00
Jan Beulich aa370d3c26 x86/cpu-policy: work around bogus warning in test harness
Despite %.12s properly limiting the number of characters read from
ident[], gcc 9 (at least up to 9.2.0) warns about the strings not
being nul-terminated:

test-cpu-policy.c:64:18: error: '%.12s' directive argument is not a nul-terminated string [-Werror=format-overflow=]
   64 |             fail("  Test '%.12s', expected vendor %u, got %u\n",
      |                  ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
test-cpu-policy.c:20:12: note: in definition of macro 'fail'
   20 |     printf(fmt, ##__VA_ARGS__);                 \
      |            ^~~
test-cpu-policy.c:64:27: note: format string is defined here
   64 |             fail("  Test '%.12s', expected vendor %u, got %u\n",
      |                           ^~~~~
test-cpu-policy.c:44:7: note: referenced argument declared here
   44 |     } tests[] = {
      |       ^~~~~

The issue was reported against gcc in their bugzilla (bug 91667).

Re-order array entries, oddly enough suppressing the warning.

Reported-by: Christopher Clark <christopher.w.clark@gmail.com>
Reported-by: Dario Faggioli <dfaggioli@suse.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-09-05 10:00:07 +02:00
Roger Pau Monné 43f0009984 p2m/ept: add _subtree suffix to ept_invalidate_emt
So that the name implies the function is used to walk the page table
pointer passed as parameter. Drop the parent_ prefix from the level
parameter, since the level passed is the one matching the EPT entry
passed in the mfn parameter.

While there also change bool_t to bool and add an assert to make sure
no level 0 entries (ie: 4K EPT leaf entries) are passed as parameters.

No functional change intended.

Suggested-by: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2019-09-05 09:59:26 +02:00
Jan Beulich 4067bbfa3b VT-d: avoid PCI device lookup
The two uses of pci_get_pdev_by_domain() lack proper locking, but are
also only used to get hold of a NUMA node ID. Calculate and store the
node ID earlier on and remove the lookups (in lieu of fixing the
locking).

While doing this it became apparent that iommu_alloc()'s use of
alloc_pgtable_maddr() would occur before RHSAs would have been parsed:
iommu_alloc() gets called from the DRHD parsing routine, which - on
spec conforming platforms - happens strictly before RHSA parsing. Defer
the allocation until after all ACPI table parsing has finished,
established the node ID there first.

Suggested-by: Kevin Tian <kevin.tian@intel.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2019-09-05 09:58:17 +02:00
Jan Beulich e03eb14548 VT-d: tidy <X>_to_<Y>() functions
Drop iommu_to_drhd() altogether - there's no need for a loop here, the
corresponding DRHD is a field in struct intel_iommu.

Constify drhd_to_rhsa()'s parameter and adjust style.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
2019-09-05 09:57:44 +02:00
Jan Beulich 8b25551baa x86/shadow: don't enable shadow mode with too small a shadow allocation (part 2)
Commit 2634b997af ("x86/shadow: don't enable shadow mode with too small
a shadow allocation") was incomplete: The adjustment done there to
shadow_enable() is also needed in shadow_one_bit_enable(). The (new)
problem report was (apparently) a failed PV guest migration followed by
another migration attempt for that same guest. Disabling log-dirty mode
after the first one had left a couple of shadow pages allocated (perhaps
something that also wants fixing), and hence the second enabling of
log-dirty mode wouldn't have allocated anything further.

Reported-by: James Wang <jnwang@suse.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Tim Deegan <tim@xen.org>
2019-09-05 09:56:42 +02:00
Alexandru Stefan ISAILA 039e70668a x86/altp2m: Add a new hypercall to get the active altp2m index
The patch adds a new lib xc function (xc_altp2m_get_vcpu_p2m_idx) that
uses a new hvmop (HVMOP_altp2m_get_p2m_idx) to get the active altp2m
index from a given vcpu.

Signed-off-by: Alexandru Isaila <aisaila@bitdefender.com>
Reviewed-by: George Dunlap <george.dunlap@citrix.com>
2019-09-04 16:17:39 +01:00
Andrew Cooper a342900d48 tools/shim: Apply more duct tape to the linkfarm logic
Sander reported a build failure which manifests as `make; make install`
failing with:

  <snip>/cross-install -m0644 -p xen-dir/xen-shim //usr/local/lib/xen/boot/xen-shim
  install: cannot stat 'xen-dir/xen-shim': No such file or directory
  make[4]: *** [Makefile:52: install] Error 1
  make[4]: Leaving directory '/usr/src/new/xen-unstable/tools/firmware'

It has subsequently been seen intermittently by OSSTest.  This was caused by
c/s 32b1d628 triggering a preexisting linkfarm bug for partial rebuilds.

Between the first `make` and the subsequent `make install`, the linkfarm logic
observes new final build products and regenerates the linkfarm.  This includes
a distclean, which throws away everything from the first `make`.

As the xen-shim rule use a symlink, the link itself remains still up-to-date
but is broken due to the distclean, which causes install to fail.

Update the linkfarm logic to not regenerate itself when build artefacts
appear.  This isn't a comprehensive fix but is the best which can be done
easily.  Any further effort would be better spent making out-of-tree builds
work for Xen.

Reported-by: Sander Eikelenboom <linux@eikelenboom.it>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
2019-09-03 14:48:45 +01:00
Andrew Cooper bf82703e8d tools/shim: Fix race condition creating linkfarm.stamp
In the case the while loop gets interrupted, the target musn't appear as
up-to-date.  The mov $X.tmp $X must be the last action of the rule.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
2019-09-03 14:48:45 +01:00
Juergen Gross 63feb88edf debugtrace: use common output function
Today dumping the debugtrace buffers is done via sercon_puts(), while
direct printing of trace entries (after toggling output to the console)
is using serial_puts().

Use sercon_puts() in both cases, as the difference between both is not
really making sense.

In order to prepare moving debugtrace functionality to an own source
file rename sercon_puts() to console_serial_puts() and make it globally
visible.

Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-09-03 14:51:28 +02:00
Jan Beulich 73dad9d966 x86emul: support INVPCID
Just like for INVLPGA the HVM hook only supports PCID 0 for the time
being for individual address invalidation. It also translates the other
types to a full flush, which is architecturally permitted and
performance-wise presumably not much worse because emulation is slow
anyway.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-09-03 14:50:33 +02:00
Jan Beulich 749c6e3c0e x86emul: generalize invlpg() hook
The hook is already in use for INVLPGA as well. Rename the hook and add
parameters. For the moment INVLPGA with a non-zero ASID remains
unsupported, but the TODO item gets pushed into the actual hook handler.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-09-03 14:49:52 +02:00
Jan Beulich 4d4fec207b x86/HVM: ignore guest INVD uses
The only place we'd expect the insn to be sensibly used is in
(virtualization unaware) firmware.

Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-09-03 14:49:20 +02:00
Jan Beulich ad3abc47dd x86emul: support WBNOINVD
Rev 037 of Intel's ISA extensions document does not state intercept
behavior for the insn (I've been unofficially told that the distinction
is going to be by exit qualification, as I would have assumed
considering that this way it's sufficiently transparent to unaware
software, as using WBINVD in place of WBNOINVD is always correct, just
less efficient). Similarly AMD's PM volume 2 version 3.31 only states
that both use the same VMEXIT, but not how to distinugish them (other
than by decoding the insn). Therefore in the HVM case for now it'll be
backed by the same ->wbinvd_intercept() handlers.

Use this occasion and also add the two missing table entries for
CLDEMOTE, which doesn't require any further changes to make work.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-09-03 14:48:19 +02:00
Juergen Gross c0536ed315 public: add macro for defining variable length array in public headers
Several public headers of the hypervisor contain structures with
variable length arrays. In order to be usable with different compilers
those definitions are depending on the compiler type and the standard
supported by the compiler.

In order to avoid open coding the different variants in each header
add a common macro for that purpose in xen.h.

This at once corrects most of the definitions which miss one case
leading to not defining the array at all.

Signed-off-by: Juergen Gross <jgross@suse.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-09-03 14:47:18 +02:00
Paul Durrant 4dc12371f3 x86/domain: remove the 'oos_off' flag
The flag is not needed since the domain 'options' can now be tested
directly.

Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Tim Deegan <tim@xen.org>
2019-09-03 14:46:08 +02:00
Andrew Cooper 8cc4476eb8 x86/apci: Adjust command line parsing for "acpi_sleep"
Perform parsing in a custom_param, rather than stashing the content in a
string and parsing in an initcall.  Adjust the parsing to conform to current
standards.

No practical change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-09-02 15:44:47 +01:00
Andrew Cooper f92d95f474 x86/acpi: Drop sleep_states[] and associated print messages
sleep_states[] is a write-only array, and despite the loop logic, the printed
message is consistently "ACPI sleep modes: S3".  Drop it all.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2019-09-02 15:39:44 +01:00
Jan Beulich e8e9f4b982 x86: shrink video_{flags,mode} to {8,16} bits
We really don't need them to be any wider.

Also remove the C level declaration (and hence also the GLOBAL) of
video_mode altogether; it's used in assembly code only.

Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-09-02 14:45:57 +02:00
Jan Beulich 242d78ae76 x86: a little bit of 16-bit video mode setting code cleanup
To "compensate" for the code size growth by an earlier change:
- drop "trampoline" labels (in almost all cases the target label is
  reachable with an 8-bit-displacement branch anyway, and a single 16-
  bit-displacement branch is still better than a pair of two branches)
- drop an entirely dead insn from wakeup.S:mode_setw
- reduce code size in a few other (obvious I hope) cases, by more
  suitable insn/operands selection

Also drop redundant #define-s (move suitable #include a little earlier
instead) and add two alignment directives.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-09-02 14:45:18 +02:00
Jan Beulich d1235883bf x86/ACPI: restore VESA mode upon resume from S3
In order for "acpi_sleep=s3_mode" to have any effect, we should record
the video mode we switched to during boot. Since right now there's mode
setting code for VESA modes only in the resume case, record the mode
just in that one case.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-09-02 14:41:19 +02:00
Jan Beulich 52dba7bd0b x86emul: generalize wbinvd() hook
The hook is already in use for other purposes, and emulating e.g.
CLFLUSH by issuing WBINVD is, well, not very nice. Rename the hook and
add parameters. Use lighter weight flushing insns when possible in
hvmemul_cache_op().

hvmemul_cache_op() treating x86emul_invd the same as x86emul_wbinvd is
to retain original behavior, but I'm not sure this is what we want in
the long run.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Paul Durrant <paul.durrant@citrix.com>
2019-09-02 14:40:15 +02:00
Jan Beulich 7ad6f2a9be timers: limit heap size
First and foremost make timer_softirq_action() avoid growing the heap
if its new size can't be stored without truncation. 64k entries is a
lot, and I don't think we're at risk of actually running into the issue,
but I also think it's better not to allow for hard to debug problems to
occur in the first place.

Furthermore also adjust the code such the size/limit fields becoming
unsigned int would at least work from a mere sizing point of view. For
this also switch various uses of plain int to unsigned int.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-09-02 14:38:37 +02:00
Igor Druzhinin b376456a78 x86/domain: don't destroy IOREQ servers on soft reset
Performing soft reset should not opportunistically kill IOREQ servers
for device emulators that might be currently running for a domain.
Every emulator is supposed to clean up IOREQ servers for itself on exit.
This allows a toolstack to elect whether or not a particular device
model should be restarted.

The original code was introduced in 3235cbfe ("arch-specific hooks for
domain_soft_reset()") likely due to the fact 'default' IOREQ server
existed in Xen at the time and used by QEMU didn't have an API call to
destroy. Since the removal of 'default' IOREQ server from Xen this
reason has gone away.

Since commit ba7fdd64b ("xen: cleanup IOREQ server on exit") QEMU now
destroys IOREQ server for itself as every other device emulator
is supposed to do. It's now safe to remove this code from soft reset
path - existing systems with old QEMU should be able to work as
even if there are IOREQ servers left behind, a new QEMU instance will
override its ranges anyway.

Signed-off-by: Igor Druzhinin <igor.druzhinin@citrix.com>
Reviewed-by: Paul Durrant <paul.durrant@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2019-08-30 15:23:01 +02:00
Jan Beulich 6e2ea60524 x86: move INVPCID_TYPE_* to x86-defns.h
This way the insn emulator can then too use the #define-s. In place of
the TYPE infix add an X86 prefix.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-08-30 15:21:54 +02:00
Jan Beulich eb91201107 x86/ACPI: re-park previously parked CPUs upon resume from S3
Aiui when resuming from S3, CPUs come back out of RESET/INIT. Therefore
they need to undergo the same procedure as was added elsewhere by
commits d8f974f1a6 ("x86: command line option to avoid use of secondary
hyper-threads") and 8797d20a6e ("x86: possibly bring up all CPUs even
if not all are supposed to be used").

Just like done at boot time, avoid (at least pointlessly) using
stop-machine logic.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-08-30 10:24:13 +02:00
Chao Gao 932f26d9d8 x86/ucode/AMD: make freeing of old ucode conditional
It is certain to be NULL at least the first time through.

Reported-by: Sander Eikelenboom <linux@eikelenboom.it>
Signed-off-by: Chao Gao <chao.gao@intel.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-08-30 10:22:55 +02:00
Jan Beulich 41c7700a00 x86: properly gate clearing of PKU feature
setup_clear_cpu_cap() is __init and hence may not be called post-boot.
Note that opt_pku nevertheless is not getting __initdata added - see
e.g. commit 43fa95ae6a ("mm: make opt_bootscrub non-init").

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-08-29 15:10:07 +02:00
Roger Pau Monné ee91a49a44 partially revert "x86/mm: Clean IOMMU flags from p2m-pt code"
This partially reverts commit
854a49a748 by re-adding the logic that
propagates changes to the domain physmap done by p2m_pt_set_entry into
the iommu page tables. Without this logic changes to the guest physmap
are not propagated to the iommu, leaving stale iommu entries that can
leak data, or failing to add new entries.

Note that this commit doesn't re-introduce iommu flags to the cpu page
table entries, since the logic to add/remove entries to the iommu page
tables is based on the p2m type and the mfn.

Fixes: 854a49a748 ('x86/mm: Clean IOMMU flags from p2m-pt code')
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Alexandru Isaila <aisaila@bitdefender.com>
Acked-by: George Dunlap <george.dunlap@citrix.com>
2019-08-29 15:08:46 +02:00
Andrew Cooper f1a9420212 x86/boot: Drop all use of lmsw
lmsw is an obsolete relic of the 286 processor - so much so that it even lacks
intercept assistance on AMD processors.

Use a plain mov to %cr0 which is easier to follow, certainly faster to
virtualise on AMD hardware, and almost certainly a faster microcode path in
real hardware.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2019-08-28 19:52:54 +01:00
Andrew Cooper ec92fcd1d0 x86/boot: Further minor GDT corrections
gdt_boot_descr and gdt_48 disagree on how long trampoline_gdt is.

Introduce an end label for each GDT and have the linker calculate their size,
rather than hard coding it.

Also, just as with c/s af292b41e9, there is no point forcing the CPU to set
Access bits.  Fix all affected GDTs.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-08-28 19:41:29 +01:00
Andrew Cooper bb70bcb65b x86/suspend: Simplify system table handling on resume
load_TR() is used exclusively in the resume path, but jumps through a lot of
unnecessary hoops.  As suspend/resume is strictly on CPU0 in idle context, the
correct GDT to use is boot_gdt, which means it doesn't need saving on suspend.

Although doing more than strictly necessary, reuse load_system_tables(), which
is already used by APs on the S3 resume path.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2019-08-28 18:51:00 +01:00
Andrew Cooper 08baf55f33 x86/desc: Move boot_gdtr into .rodata
It is never written to.

This was an oversight when it was moved from asm into C.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2019-08-28 18:49:07 +01:00
Andrew Cooper 87e7b4d5b0 x86/suspend: Sanity check more properties in enter_state()
The logic depends on being run on CPU0, and in IDLE context.  Having this
explicitly identified allows for simplification of the whole S3 path.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2019-08-28 18:48:44 +01:00
Andrew Cooper 27869ee00e xen: Drop XEN_DOMCTL_{get,set}_machine_address_size
This functionality is obsolete.  It was introduced by c/s 41296317a3 into
Xend, but was never exposed in libxl.

Nothing limits this to PV guests, but it makes no sense for HVM guests.

Looking through the XenServer templates, this was used to work around bugs in
the 32bit RHEL/CentOS 4.7 and 4.8 kernels (fixed in 4.9) and RHEL/CentOS/OEL
5.2 and 5.3 kernels (fixed in 5.4).  RHEL 4 as a major version went out of
support in 2017, whereas the 5.2/5.3 kernels went out of support when 5.4 was
released in 2009.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
Acked-by: Christian Lindig <christian.lindig@citrix.com>
Acked-by: Wei Liu <wl@xen.org>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-08-28 18:28:31 +01:00
Andrew Cooper cf97ba7f7a xen: Drop XEN_DOMCTL_suppress_spurious_page_faults
This functionality is obsolete.  It was introduced by c/s 39407bed9c into
Xend, but never exposed in libxl.

While not explicitly limited to PV guests, this is PV-only by virtue of its
position in the pagefault handler.

Looking though the XenServer templates, this was used to work around bugs in
the 32bit RHEL/CentOS 4.{5..7} kernels (fixed in 4.8).  RHEL 4 as a major
version when out if support in 2017.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
Acked-by: Wei Liu <wl@xen.org>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-08-28 18:28:31 +01:00
Paul Durrant d0c0ba7d3d x86/hvm/domain: remove the 'hap_enabled' flag
The hap_enabled() macro can determine whether the feature is available
using the domain 'options'; there is no need for a separate flag.

NOTE: Furthermore, by extending sanitizing of the domain 'options', the
      macro can be transformed into an inline function and re-located to
      xen/sched.h. This also makes hap_enabled() common, thus allowing
      removal of an ugly ifdef CONFIG_X86 from the common iommu code.

Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-08-28 16:58:45 +02:00
Roger Pau Monné b806c91275 p2m/ept: pass correct level to atomic_write_ept_entry in ept_invalidate_emt
The level passed to ept_invalidate_emt corresponds to the EPT entry
passed as the mfn parameter, which is a pointer to an EPT page table,
hence the entries in that page table will have one level less than the
parent.

Fix the call to atomic_write_ept_entry to pass the correct level, ie:
one level less than the parent.

Fixes: 50fe6e7370 ('pvh dom0: add and remove foreign pages')
Signed-off-by: Roger Pau Monné <roger.pau@citrix.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>.
2019-08-28 16:57:36 +02:00
Chao Gao de45e3ff37 microcode/amd: fix memory leak
Two buffers, '->equiv_cpu_table' and '->mpb',  inside 'mc_amd' might be
allocated and in the error-handing path they are not freed properly.

Signed-off-by: Chao Gao <chao.gao@intel.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2019-08-28 16:52:18 +02:00
Julien Grall 10279e3560 xen/arm: traps: Remove all zero padding before PRIregister format
Commit af156ff085 "xen/arm: types: Specify the zero padding in the
definition of PRIregister" moved the zero padding within the definition
of PRIregister.

However, some of the users still had zero padding before which result
to print tens of zero when dumping the CPU state.

To prevent this, remove the last users of zero padding before
PRIregister.

Signed-off-by: Julien Grall <julien.grall@arm.com>
Reviewed-by: Volodymyr Babchuk <volodymyr.babchuk@epam.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
2019-08-27 13:14:15 -07:00
Igor Druzhinin 6c093931a7 x86/mm: correctly initialise M2P entries on boot
Since guest resource management work it's now possible to have a page
assigned to a domain without a valid M2P entry. Some paths in the code
rely on the fact a GFN returned from mfn_to_gfn() for such a page
is not valid as well, i.e. see arch_iommu_populate_page_table().

For systems without 512GB contiguous RAM M2P entries were already
correctly initialised on boot with INVALID_M2P_ENTRY (~0UL) but
on systems where M2P could be covered by a single 1GB page directory
0x77 poison was used instead. That eventually resulted in a crash
during IOMMU construction on systems without shared PTs enabled.

While here fix up compat M2P entries as well.

Signed-off-by: Igor Druzhinin <igor.druzhinin@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2019-08-27 13:40:42 +01:00