Commit Graph
32667 Commits
Author SHA1 Message Date
Ross Lagerwall ba22f1f473 vmx: restore debug registers when injecting #DB traps
Commit a929bee0e6 ("x86/vmx: Fix injection of #DB traps following
XSA-156") prevents an infinite loop in certain #DB traps. However, it
changed the behavior to not call hvm_hw_inject_trap() for #DB and #AC
traps which which means that the debug registers are not restored
correctly and nullified commit b56ae5b48c ("VMX: fix/adjust trap
injection").

To fix this, restore the original code path through hvm_inject_trap(),
but ensure that the struct hvm_trap is populated with all the required
data.

Signed-off-by: Ross Lagerwall <ross.lagerwall@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2016-03-15 12:19:13 +01:00
Malcolm Crossley 61a5cfe15d restore p2m_access_t enum order to allow bitmask semantics
Nested hap code assumed implict bitmask semantics of the p2m_access_t
enum prior to C/S 4c63692d7c

The change to the enum ordering broke this assumption and caused functional
problems for the nested hap code. As it may be error prone to audit and find
all other p2m_access users assuming bitmask semantics, instead restore the
previous enum order and make it explict that bitmask semantics are to be
preserved for the read, write and execute access types.

Signed-off-by: Malcolm Crossley <malcolm.crossley@citrix.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: George Dunlap <george.dunlap@citrix.com>
2016-03-15 12:17:52 +01:00
Wei Liu c2b9b97775 libxl: use LIBXL__LOG in libxl_ctx_alloc
Coverity points out that using LOG macro dereferences gc which is NULL
at that point. Use LIBXL__LOG instead.

CID: 1343291

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
2016-03-14 17:12:47 +00:00
Jan Beulich 71b165d2d4 x86emul: fix 32-bit test build
Commit 5644ce0142 ("x86emul: relax asm() constraints") introduced a
64-bit only instruction suffix, which breaks running the emulator test
on a 32-bit system. Mirror __OS (and _OP for completeness) to the test
wrapper source file.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-03-14 13:02:56 +01:00
Jan Beulich 74760ba14f x86emul: check host features alongside guest ones where needed
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-03-14 13:02:33 +01:00
Jan Beulich dc88221c97 x86: rename XMM* features to SSE*
The latter are their canonical names, used already in the instruction
emulator.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-03-14 13:02:00 +01:00
Quan Xu bfa493f52e IOMMU: make the pcidevs_lock a recursive one
The pcidevs_lock is going to be recursively taken for hiding ATS
device, when VT-d Device-TLB flush timed out.

Signed-off-by: Quan Xu <quan.xu@intel.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
Reviewed-by: Dario Faggioli <dario.faggioli@citrix.com>

pcidevs_is_locked() -> pcidevs_locked(). Add __must_check to
pcidevs_locked() and pcidevs_trylock() declarations.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
2016-03-14 13:00:32 +01:00
Quan Xu bf55ead25c AMD IOMMU: fix an init time spinlock flaw
pcidevs_lock doesn't require interrupts to be disabled while being acquired.
However there remains an exception in AMD IOMMU code, where the lock is
acquired with interrupt disabled. This inconsistency might lead to deadlock.

The fix is straightforward to use spin_lock instead. Also interrupt has been
enabled when this function is invoked, so we're sure consistency around
pcidevs_lock can be guaranteed after this fix.

Signed-off-by: Quan Xu <quan.xu@intel.com>
Reviewed-by: Dario Faggioli <dario.faggioli@citrix.com>
Reviewed-by: Kevin Tian <kevin.tian@intel.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-03-14 12:59:39 +01:00
Doug Goldstein e46a729b18 libxl: ensure var is inited in libxl__domain_firmware
Some versions of GCC complain that the 'firmware' variable can be used
uninitialized. It looks like the switch inside of the else case is just
confusing GCC.

Signed-off-by: Doug Goldstein <cardoe@cardoe.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-03-10 18:44:24 +00:00
Wei Liu ae3c165b81 libxc: simplify error handling in meminit_hvm
The hunk that prints out error message can only be reached from the loop
that allocates memory. Move that hunk into the loop to avoid confusing
gcc.

Reported-by: Doug Goldstein <cardoe@cardoe.com>
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Reviewed-by: Doug Goldstein <cardoe@cardoe.com>
Acked-by: Roger Pau Monne <roger.pau@citrix.com>
2016-03-10 18:40:17 +00:00
Dario Faggioli f233dd6bcd sched: add Meng as RTDS maintainer
Meng Xu is one of the maintainers of the RT-Xen project,
which is from where the RTDS scheduler comes. He also
is the main author of the version of RTDS that we currently
have here upstream.

Since the upstreaming effort, he's continued looking after
the code, engaging with the community, coming and presenting
at XenSummits and, last but not least, doing development
himself as well as directing the work of others, with the
aim of improving the scheduler.

In summary, he has reached the point, both from thechnical
and community engagement point of views, where he can
effectively serve as a maintainer of RTDS code.

Signed-off-by: Dario Faggioli <dario.faggioli@citrix.com>
Acked-by: Meng Xu <mengxu@cis.upenn.edu>
Acked-by: George Dunlap <george.dunlap@citrix.com>
2016-03-10 16:51:40 +01:00
David Vrabel dff593c7b6 x86: don't flush the whole cache when changing cachability
Introduce the FLUSH_VA_VALID flag to flush_area_mask() and friends to
say that it is safe to use CLFLUSH (i.e., the virtual address is still
valid).

Use this when changing the cachability of the Xen direct mappings (in
response to the guest changing the cachability of its mappings). This
significantly improves performance by avoiding an expensive WBINVD.

This fixes a performance regression introduced by
c61a6f74f8 (x86: enforce consistent
cachability of MMIO mappings), the fix for XSA-154.

e.g., A set_memory_wc() call in Linux:

before: 4097 us
after:    47 us

Signed-off-by: David Vrabel <david.vrabel@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-03-10 16:51:03 +01:00
Jan Beulich 119f09734a x86/shadow: avoid extra local array variable
mfns[2] was there just because struct sh_emulate_ctxt's two MFN values
can't be used to hand to vmap(). Making the structure fields an array
avoids the extra copying.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Tim Deegan <tim@xen.org>
2016-03-10 16:50:30 +01:00
Jan Beulich 2c80710a78 x86/shadow: compile most write emulation code just once
No need to compile all of this code three times, as most of it really
is guest mode independent. The savings are between 3k and 4k of binary
code in my builds. For this to fully work out, the sh_gva_to_gfn()
calls are being replaced by indirect ones through the paging mode
table.

No functional change (i.e. only formatting and naming changes) except
for
- sh_emulate_map_dest()'s user mode check corrected for the PV case
  (affecting debugging mode only, this isn't being split out)
- simplifying the vaddr argument to emulate_gva_to_mfn() for the second
  part in the cross page write case

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Tim Deegan <tim@xen.org>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-03-10 16:48:23 +01:00
Razvan Cojocaru 4640ab6e22 x86/HVM: don't disable the REP emulation optimizations for regular IO
Currently REP emulations optimizations remain disabled even if
the emulation does not happen as a result of a vm_event reply
requestion emulation (i.e. even for regular IO). This patch takes
emulate_each_rep into account only if emulation has been requested
by a vm_event-capable application, and is a noticeable speed
optimization for monitored guests.

Signed-off-by: Razvan Cojocaru <rcojocaru@bitdefender.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Tamas K Lengyel <tamas@tklengyel.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-03-10 16:47:48 +01:00
Jan Beulich 3cdad9183a x86/xstate: undo bogus adjustment to xsave()
This reverts an unintended change in commit 879b44b041 ("x86/fpu: add
a per-domain field to set the width of FIP/FDP"), which I had done
intermediately while fixing the build issue: After having reverted that
adjustment I must have forgotten to "git add" the adjustment.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-03-10 16:47:02 +01:00
Andrew Cooper fc0e69e635 tools/misc: drop unused function from gtracestat
Fixes a build failure with Clang.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-03-10 16:46:03 +01:00
Andrew Cooper a306f8107a tools/foreign: avoid using alignment directives when not appropriate
The foreign header generation blindly replaces 'uint64_t' with '__align8__
uint64_t', to get correct alignment when built as 32bit.  This is correct in
most circumstances, but Clang objects to two specific uses.

 * Inside a sizeof() expression
 * As part of a typecast

An example error looks like:

/local/xen.git/tools/libxc/../../tools/include/xen/foreign/x86_64.h:204:44:
error: 'aligned' attribute ignored when parsing type [-Werror,-Wignored-attributes]
    __align8__ uint64_t evtchn_mask[sizeof(__align8__ uint64_t) * 8];
                                           ^~~~~~~~~~
/local/xen.git/tools/libxc/../../tools/include/xen/foreign/x86_64.h:13:36:
note: expanded from macro '__align8__'
                                   ^~~~~~~~~~~

This sedary is sufficient to fix all the bad examples without touching any of
the legitimate uses, and is more simple than teaching mkheader.py how to parse
C.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Wei Liu <wei.liu2@citrix.com>
2016-03-10 16:45:55 +01:00
Stefano Stabellini b91c845deb add Julien as ARM maintainer
I would like to propose Julien Grall (julien.grall@arm.com) as
co-maintainer for Xen on ARM. His track record of contributions to the
project is outstanding and I think speaks for itself.

Julien made multiple public presentations about Xen on ARM at Xen
Developer Summit and Linaro Connect conferences. He led the development
of several key features, such as SMMU support and non-PCI passthrough
and participated in the design and the review of large code
contributions from others.

Signed-off-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
Acked-by: Julien Grall <julien.grall@arm.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-03-10 16:45:31 +01:00
Andrew Cooper 6890e07e48 mm: fix page_list_* helpers to evaluate all their arguments
If an architecture does not provide a custom page_list_entry, default
page_list_* helpers are provided, wrapping list_head as an underlying type for
page_list_head.

The two declarations of the page_list_* helpers differ between defines and
static inline functions, where the defines discard some of their parameters.

This causes a compilation failure if CONFIG_BIGMEM and debug=n in p2m-pod.c:

  p2m-pod.c: In function ‘p2m_pod_cache_add’:
  p2m-pod.c:72:20: error: unused variable ‘d’ [-Werror=unused-variable]
       struct domain *d = p2m->domain;
                      ^
  cc1: all warnings being treated as errors

because the use of d outside of the !NDEBUG section doesn't get evaluated as a
parameter by page_list_del().

Fix this by turning all #defines into static inline functions, so all
parameters are evaluated even if they are not used.

While editing this area, correct the return type of page_list_empty from int
to bool_t.

No functional change.

Reported-by: Doug Goldstein <cardoe@cardoe.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Doug Goldstein <cardoe@cardoe.com>
Acked-by: George Dunlap <george.dunlap@eu.citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-03-09 16:52:31 +01:00
Andrew Cooper 8979888d2d mm: introduce arch_free_heap_page()
common/page_alloc.c references d->arch.relmem_list, which only exists on x86.
This only compiles on ARM because page_list_del2() discards its second
argument.

Introduce a new common arch_free_heap_page() which only uses common lists in
struct domain, and allow an architecture to override this with a custom
alternative.  x86 then provides a custom arch_free_heap_page() which takes
care of managing d->arch.relmem_list.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-03-09 16:51:50 +01:00
Jan Beulich cd29140ef0 x86/alternatives: correct near branch check
Make sure the near JMP/CALL check doesn't consume uninitialized
data, not even in a benign way. And relax the length check at once.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-03-09 16:51:16 +01:00
Juergen Gross 882b186d56 domctl: add force flag to xen_domctl_vcpuaffinity for undoing pin override
Add a XEN_VCPUAFFINITY_FORCE flag to xen_domctl_vcpuaffinity structure
which will allow to undo a SCHEDOP_pin_override in case of a driver
error of the hardware domain which didn't do the expected
SCHEDOP_pin_override with cpu < 0 which would have done the undo
operation.

Signed-off-by: Juergen Gross <jgross@suse.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-03-09 16:50:29 +01:00
Juergen Gross 8fa0fca9f3 sched: add hypercall option to override and restore vcpu affinity
Some hardware (e.g. Dell studio 1555 laptops) require SMIs to be
called on physical cpu 0 only. Linux drivers like dcdbas or i8k try
to achieve this by pinning the running thread to cpu 0, but in Dom0
this is not enough: the vcpu must be pinned to physical cpu 0 via
Xen, too.

Add a stable hypercall option SCHEDOP_pin_override to the sched_op
hypercall to achieve this. It is taking a physical cpu number as
parameter. If pinning is possible (the calling domain has the
privilege to make the call and the cpu is available in the domain's
cpupool) the calling vcpu is pinned to the specified cpu. The old
cpu affinity is saved. To undo the override pinning a negative cpu
value is specified. This will restore the original cpu affinity of
the vcpu.

Signed-off-by: Juergen Gross <jgross@suse.com>
Acked-by: Dario Faggioli <dario.faggioli@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2016-03-09 16:49:59 +01:00
Juergen Gross d62ead2eb2 cpupool: correct error handling when removing cpu from cpupool
When schedule_cpu_switch() called from cpupool_unassign_cpu_helper()
returns an error, the domlist_read_lock isn't released again.

As cpu_disable_scheduler() might have changed affinity of some
domains domain_update_node_affinity() must be called for all domains
in the cpupool even in error case.

Even if looking weird it is okay to let the to be removed cpu set in
cpupool_free_cpus in case of an error returned by
cpu_disable_scheduler(). Add a comment explaining the reason for this.

Signed-off-by: Juergen Gross <jgross@suse.com>
Acked-by: Dario Faggioli <dario.faggioli@citrix.com>
2016-03-09 16:48:30 +01:00
Andrew Cooper 0aa1330aac x86/vPMU: do not clobber IA32_MISC_ENABLE
The VMX RDMSR intercept for MSR_IA32_MISC_ENABLE falls through into
vpmu_do_rdmsr(), so that core2_vpmu_do_rdmsr() may play with the PTS and PEBS
UNAVAIL bits.

Some 64bit Windows include IA32_MISC_ENABLE in the set of items checked by
PatchGuard, and will suffer a BSOD 0x109 CRITICAL_STRUCTURE_CORRUPTION if the
contents change on migrate.

The vPMU infrastructure should not clobber IA32_MISC_ENABLE at all.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2016-03-07 17:46:25 +01:00
Andrew Cooper 305e957ffe hvmloader: use xen/errno.h rather than the host systems errno.h
hvmloader is unhosted, and shouldn't use the system errno.h.  It already has
to use Xen's errno.h for other hypercalls.  The use of public/io/xs_wire.h
requires the use of un-prefixed errno values.

This fixes the build on stricter toolchains where requesting -fno-builtin does
reduce the include path as much as it can.

Reported-by: Doug Goldstein <cardoe@cardoe.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Doug Goldstein <cardoe@cardoe.com>
Reviewed-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-03-07 17:46:03 +01:00
Andrew Cooper 67790205df public/errno: Reduce complexity of inclusion
The inclusion rules conditions for errno.h were unnecesserily complicated, and
required the includer to jump through hoops if they wished to avoid getting
multiple namespaces worth of constants.

Simply the logic, and document what is going on.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-03-07 17:45:13 +01:00
Konrad Rzeszutek Wilk 6a5f34a262 Merge branch 'tracing/sched-events-improvements' of git://xenbits.xen.org/people/dariof/xen into staging
* 'tracing/sched-events-improvements' of git://xenbits.xen.org/people/dariof/xen:
  xenalyze: handle Credit2 scheduler events
  xenalyze: handle Credit1 scheduler events
  xenalyze: handle scheduling events
  xentrace: formats: add domain create and destroy events.
  xentrace: formats: add events from RTDS scheduler
  xentrace: formats: add events from Credit2 scheduler
  xentrace: formats: add events from Credit scheduler
  xentrace: formats: update format of scheduling events

On the mailing list all patches have:
Acked-by: George Dunlap <george.dunlap@citrix.com>

and have been
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>

so in they go.

Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2016-03-07 10:39:24 -05:00
Doug Goldstein 54ef3ed144 travis: actually disable debug for non-debug
Non-debug builds need to explicitly disable debug due to debug being
defaulted to y in Config.mk

(Xen keeps debug=y in the staging branch. When Xen is in rc-X stage
the debug is altered so that the builds don't have the debug
option enabled by default).

Signed-off-by: Doug Goldstein <cardoe@cardoe.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2016-03-07 10:33:12 -05:00
Doug Goldstein 9bcc3998bd travis: use matching C++ for GCC version
When we use GCC 5.x, we need to install the C++ compiler and the C
compiler together because QEMU tests for feature flags against the C
compiler and assumes the C++ compiler has them. We also have to
ensure that GCC C++ is used. Have to do the modification of the CXX variable
in two steps to ensure we support older versions of bash in use by the
test machines. While we're at it simply how we select our compiler.

Signed-off-by: Doug Goldstein <cardoe@cardoe.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2016-03-07 10:30:05 -05:00
Doug Goldstein 4442d436e0 travis: skip building coverity, smoke, and master
Skip building of the coverity, smoke, stable, and master branches since
they just fast forward from staging.

Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Doug Goldstein <cardoe@cardoe.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2016-03-07 10:29:54 -05:00
Dario Faggioli 793313e2fe xenalyze: handle Credit2 scheduler events
so the trace will show properly decoded info,
rather than just a bunch of hex codes.

Signed-off-by: Dario Faggioli <dario.faggioli@citrix.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
Cc: George Dunlap <george.dunlap@eu.citrix.com>
Cc: Ian Jackson <ian.jackson@eu.citrix.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>
Cc: Olaf Hering <olaf@aepfle.de>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
Changes from v1:
 * '} * r =' turned into '} *r =', as requested
   during review.
2016-03-07 14:28:14 +01:00
Dario Faggioli b5715a72f7 xenalyze: handle Credit1 scheduler events
so the trace will show properly decoded info,
rather than just a bunch of hex codes.

Signed-off-by: Dario Faggioli <dario.faggioli@citrix.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
Cc: George Dunlap <george.dunlap@eu.citrix.com>
Cc: Ian Jackson <ian.jackson@eu.citrix.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>
Cc: Olaf Hering <olaf@aepfle.de>
---
Changes from v1:
 * '} * r =' turned into '} *r =', as requested
   during review.
2016-03-07 14:28:13 +01:00
Dario Faggioli 52cf096df7 xenalyze: handle scheduling events
so the trace will show properly decoded info,
rather than just a bunch of hex codes.

Signed-off-by: Dario Faggioli <dario.faggioli@citrix.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
Cc: George Dunlap <george.dunlap@eu.citrix.com>
Cc: Ian Jackson <ian.jackson@eu.citrix.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>
Cc: Olaf Hering <olaf@aepfle.de>
---
Changes from v1:
 * SCHED_DOM_{ADD,REM} handling slightly changed, to avoid
   confusion with DOM0_DOM_{ADD,REM} (introduced later in
   the series);
 * '} * r =' turned into '} *r =', as requested
   during review.
2016-03-07 14:28:11 +01:00
Dario Faggioli 74425bad0e xentrace: formats: add domain create and destroy events.
Signed-off-by: Dario Faggioli <dario.faggioli@citrix.com>
---
Cc: George Dunlap <george.dunlap@eu.citrix.com>
Cc: Ian Jackson <ian.jackson@eu.citrix.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>
Cc: Olaf Hering <olaf@aepfle.de>
Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
Changes from v2:
 * new patch in the series.
2016-03-07 14:28:08 +01:00
Dario Faggioli 1c03510909 xentrace: formats: add events from RTDS scheduler
Signed-off-by: Dario Faggioli <dario.faggioli@citrix.com>
---
Cc: George Dunlap <george.dunlap@eu.citrix.com>
Cc: Meng Xu <xumengpanda@gmail.com>
Cc: Tianyang Chen <tiche@seas.upenn.edu>
Cc: Ian Jackson <ian.jackson@eu.citrix.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>
Cc: Olaf Hering <olaf@aepfle.de>
2016-03-07 14:28:07 +01:00
Dario Faggioli 46283d1200 xentrace: formats: add events from Credit2 scheduler
Signed-off-by: Dario Faggioli <dario.faggioli@citrix.com>
---
Cc: George Dunlap <george.dunlap@eu.citrix.com>
Cc: Ian Jackson <ian.jackson@eu.citrix.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>
Cc: Olaf Hering <olaf@aepfle.de>
---
Changes from v1:
 * fix typo in two events (rq_idx/rq_id)., as requested during
   review.
2016-03-07 14:28:06 +01:00
Dario Faggioli 370e10fa64 xentrace: formats: add events from Credit scheduler
Signed-off-by: Dario Faggioli <dario.faggioli@citrix.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
Cc: George Dunlap <george.dunlap@eu.citrix.com>
Cc: Ian Jackson <ian.jackson@eu.citrix.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>
Cc: Olaf Hering <olaf@aepfle.de>
2016-03-07 14:28:05 +01:00
Dario Faggioli 8a50f16802 xentrace: formats: update format of scheduling events
to include the vcpu IDs, in a way that matches
how the "dom:vcpu" couple is displayed in other
events (runstate changes).

Also add the trace for TRC_SCHED_SHUTDOWN_CODE which
was missing and was done via SCHEDOP_shutdown_code hypercall.
(TRC_SCHED_SHUTDOWN trace was present).

Signed-off-by: Dario Faggioli <dario.faggioli@citrix.com>
Reviewed-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
---
Cc: George Dunlap <george.dunlap@eu.citrix.com>
Cc: Ian Jackson <ian.jackson@eu.citrix.com>
Cc: Ian Campbell <ian.campbell@citrix.com>
Cc: Wei Liu <wei.liu2@citrix.com>
Cc: Olaf Hering <olaf@aepfle.de>
---
Changes from v1:
 * enhanced changelog, as suggested during review.
2016-03-07 14:27:40 +01:00
Shannon Zhao 1bd52e1fd6 arm/timer: fix panic when booting with DT
While to support ACPI, patch "arm/acpi: Parse GTDT to initialize timer"
refactors the functions preinit_xen_time and init_xen_time. But it
wrongly moves the platform_get_irq from init_xen_time to
preinit_dt_xen_time and this will cause booting failure.

So move platform_get_irq back to init_xen_time to fix it.

Signed-off-by: Shannon Zhao <shannon.zhao@linaro.org>
Reviewed-by: Stefano Stabellini <stefano.stabellini@eu.citrix.com>
2016-03-04 16:45:52 +01:00
Jan Beulich 0e0f7d9e1a x86/HVM: re-format cache attribute pinning code
No intended functional change, albeit it includes ditching a redundant
is_hvm_domain().

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-03-04 14:16:48 +01:00
Jan Beulich d29cf2e8f5 x86/HVM: adjust hvm_get_mem_pinned_cacheattr() GFN parameter
Make it gfn_t and rename it accordingly.

Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
2016-03-04 14:16:18 +01:00
Jan Beulich efd5c610a2 x86/HVM: limit flushing on cache attribute pinning adjustments
Avoid cache flush on EPT when removing a UC- range, since when used
this type gets converted to UC anyway (there's no UC- among the types
valid in MTRRs and hence EPT's emt field).

We might further wwant to consider only forcing write buffer flushes
when removing WC ranges.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-03-04 14:15:53 +01:00
Jan Beulich 0681fdbd36 x86/HVM: adjust hvm_set_mem_pinned_cacheattr() error indications
Make it return an error on bad domain kind or obviously bad GFN range.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-03-04 14:15:26 +01:00
Jan Beulich 96ade6f697 x86/HVM: remove unnecessary indirection from hvm_get_mem_pinned_cacheattr()
Its return value can easily serve the purpose. We cannot, however,
return unspecific "success" anymore for a domain of the wrong type -
since no caller exists that would call this for PV domains, simply add
an ASSERT().

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
2016-03-04 14:14:25 +01:00
Jan Beulich 0acc7010ac x86/HVM: honor cache attribute pinning for RAM only
Call hvm_get_mem_pinned_cacheattr() for RAM ranges only, and only when
the guest has a physical device assigned: XEN_DOMCTL_pin_mem_cacheattr
is documented to be intended for RAM only.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
2016-03-04 14:12:11 +01:00
Jan Beulich 8ac9cc7a72 x86: use "unsigned int" for cache attribute values
... where suitable. But note that the type of "cacheattr" in
get_page_from_l1e() specifically needs to remain "unsigned long".

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2016-03-04 14:09:04 +01:00
Paul Durrant 15b1e8d864 public/io/netif.h: make control ring hash protocol more general
This patch modified the control ring protocol (of which there is
not yet an implementation) to make it more general. Most of the
concepts are not limited to toeplitz hashing so it's best not to
make them unnecessarily specific.

Apart from changing the names of various definitions and modifying
comments, this patch:

- Adds a new control message type to select a hash algorithm.
- Adds a reference implementation of the toeplitz hash.
- Changes the 'toeplitz' extra info fragment into a 'hash' extra
  info fragment and replaces the octet of padding with the index of
  the algorithm that was used to create the hash value.
- Relaxes the restriction that the mapping table has to be
  power-of-2 sized.

The patch also fixes a few spelling typos noticed along the way.

Signed-off-by: Paul Durrant <paul.durrant@citrix.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-03-04 14:08:38 +01:00
Andrew Cooper 03720ea541 errno: declare aliases using XEN_ERRNO()
Otherwise a custom XEN_ERRNO definition will not end up creating appropriately
namespaced constants for the aliases.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Doug Goldstein <cardoe@cardoe.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2016-03-03 09:50:11 +01:00