Commit Graph
100 Commits
Author SHA1 Message Date
Andrew Cooper d9fcdb0c7a docs/hypfs: Adjust the hypfs layout example
The controls for cpu-bugs were ultimately not taken.  As the paths are
documented fully below, pick only a small subset for the example.  Include
cpupool/ as it exists now.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Juergen Gross <jgross@suse.com>
2026-03-30 15:48:13 +01:00
Andrew Cooper 4c607bbb1e x86/hvm: Configuration for Linear Address Space Separation
LASS is a feature designed in the aftermath of Meltdown, which codifies the
user/kernel split in address space in order to block entire classes of
sidechanels.  Specifically, it allows the CPU to terminate any memory access
into the wrong half of the address space based on linear address alone and
without needing a pagewalk.

It is available in CPUs starting with Intel Sierra Forrest (2023).

For now, allow LASS to be opted in to, but leave it off by default.  Some work
in the emulator is going to be needed to enable it by default.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-30 15:48:13 +01:00
Andrew Cooper 7bcac0c99b x86/fred: Fix FRED name in comments
The patch introducing these constants predate the feature being renamed.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-03-27 18:56:42 +00:00
Andrew Cooper efacf86685 xen/public: Delete duplicate VGCF constants
Having two spellings of the constants makes following the code unnecessarily
difficult.  Reduce it to one spelling.

This is an API change in the public headers, but one for the better.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-03-23 18:19:59 +00:00
Andrew Cooper bd15fdedaf x86/ucode: Exclude Zen6 from entrysign mitigations
Family 0x1a covers both Zen5 and Zen6, but the latter is not believed to be
vulnerable to entrysign.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-19 13:20:30 +00:00
Andrew Cooper 6db6211942 xen/coverage: Drop support for older GCOV
With the GCC toolchain baseline now at 5.1, gcc_3_4.o (covering 3.4 through
4.6) will never get chosen.  Drop it.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Michal Orzel <michal.orzel@amd.com>
2026-03-19 13:20:30 +00:00
Andrew Cooper 2429e82c71 xen: Bracket uses of macro parameters
Fixing Rule 20.7 violations.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Michal Orzel <michal.orzel@amd.com>
2026-03-13 17:18:04 +00:00
Andrew Cooper f03a9e3bd9 xen/argo: Fix MISRA violations around function parameters
For the ARM build only, Eclair reports a R8.4 violation because do_argo_op()
cannot see its declaration.  This means that x86 is picking hypercall-defs.h
up transitively while ARM is not.  Include xen/hypercall.h explicitly.

Eclair also reports a R8.3 violation because of arg3 and arg4 differing in
name with a raw_ prefix.  Because hypercall-defs.h generates both do_argo_op()
and compat_argo_op() from a single description, it's not possible to simply
rename to raw_ in the declaration, as that would force doing the same rename
in compat_argo_op().

In do_argo_op(), drop the split parameter handling, and perform the 32bit
range check via an explicit cast.  While adjusting the surrounding logic, drop
unnecessary casts to void * for already pointer arguments in argo_printk().

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Daniel P. Smith <dpsmith@apertussolutions.com>
2026-03-13 17:18:04 +00:00
Andrew Cooper dbd936248f x86: Clamp bits in eflags more aggressively
In FRED mode, ERET is stricter than IRET about flags.  Notably this means:

 * The vm86 bit (bit 17) and IOPL (bits 12,13) must be clear.
 * The sticky-1 reserved bit (bit 2) must be set, so dom0_construct() needs to
   set X86_EFLAGS_MBS in order for a PV dom0 to start.
 * All other reserved bits must be clear.

Xen has been overly lax with reserved bit handling.  Adjust
arch_set_info_guest*() and hypercall_iret() which consume flags to clamp the
reserved bits for all guest types.

This is a minor ABI change, but by the same argument as commit
9f892f84c2 ("x86/domctl: Stop using XLAT_cpu_user_regs()"); the reserved
bits would get clamped like this naturally by hardware when the vCPU is run.

The handling of vm86 is also different.  Guests under 32bit Xen really could
use vm86 mode, but Long Mode disallows vm86 mode and IRET simply ignores the
bit.  Xen's behaviour for a PV32 guest trying to use vm86 mode under a 64bit
Xen is to arrange to deliver #GP at the target of the IRET, rather than to
fail the IRET itself.

However there's no filtering in arch_set_info_guest() itself, and it can't
arrange to queue a #GP at the target, so do the next best thing and fail the
hypercall.  This is not expected to create an issue for PV guests, as the
result of such an arch_set_info_guest() previously would be to run supposedly
Real Mode code as Protected Mode code.

This allows PV guests to start when Xen is using FRED mode.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-13 17:18:04 +00:00
Andrew Cooper 705784e512 x86/traps: Use fatal_trap() for #UD and #GP
This renders the diagnostics in a more uniform way.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-03-10 11:58:33 +00:00
Andrew Cooper 76193ef47d x86/pv: System call handling in FRED mode
Under FRED, entry_from_pv() handles everything, even system call instructions.
This means more of our logic is written in C now, rather than assembly.

In order to facilitate this, introduce pv_inject_callback(), which reuses
struct trap_bounce infrastructure to inject the syscall/sysenter callbacks.
This in turns requires some !PV compatibility for pv_inject_callback() and
pv_hypercall() which can both be ASSERT_UNREACHABLE().

For each of INT $N, SYSCALL and SYSENTER, FRED gives us interrupted context
which was previously lost.  As the guest can't see FRED, Xen has to lose state
in the same way to maintain the prior behaviour.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-10 11:58:23 +00:00
Andrew Cooper 99edc6c2a0 x86/pv: ERETU error handling
ERETU can fault for guest reasons, and like IRET needs special handling to
forward the error into the guest.

As this is largely written in C, take the opportunity to better classify the
sources of error, and in particular, not forward errors that are actually
Xen's fault into the guest, opting for a domain crash instead.

Because ERETU does not enable NMIs if it faults, a corner case exists if an
NMI was taken while in guest context, and the ERETU back out faults.  Recovery
must involve an ERETS with the interrupted context's NMI flag.

See the comments for full details.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-10 11:58:07 +00:00
Andrew Cooper 87cfcbe9f0 x86/pv: Guest exception handling in FRED mode
Under FRED, entry_from_pv() handles everything.  To start with, implement
exception handling in the same manner as entry_from_xen(), although we can
unconditionally enable interrupts after the async/fatal events.

After entry_from_pv() returns, test_all_events() needs to run to perform
exception and interrupt injection.  Split entry_FRED_R3() into two and
introduce eretu_exit_to_guest() as the latter half, coming unilaterally from
restore_all_guest().

For all of this, there is a slightly complicated relationship with CONFIG_PV.
entry_FRED_R3() must exist irrespective of CONFIG_PV, because it's the
entrypoint registered with hardware.  For simplicity, entry_from_pv() is
always called, but it collapses into fatal_trap() in the !PV case.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-10 11:57:53 +00:00
Andrew Cooper 9ea7d7f939 x86/pv: Adjust GS handling for FRED mode
When FRED is active, hardware automatically swaps GS when changing privilege,
and the SWAPGS instruction is disallowed.

For native OSes using GS as the thread local pointer this is a massive
improvement on the pre-FRED architecture, but under Xen it makes handling PV
guests more complicated.  Specifically, it means that GS_BASE and GS_SHADOW
are the opposite way around in FRED mode, as opposed to IDT mode.

This leads to the following changes:

  * In load_segments(), we already load both GSes.  Account for FRED in the
    SWAP() condition and avoid the path with SWAGS.

  * In save_segments(), we need to read GS_SHADOW rather than GS_BASE.

  * In toggle_guest_mode(), we need to emulate SWAPGS.

  * In {read,write}_msr() which access the live registers, GS_SHADOW and
    GS_BASE need swapping.

  * In do_set_segment_base(), merge the SEGBASE_GS_{USER,KERNEL} cases and
    take FRED into account when choosing which base to update.

    SEGBASE_GS_USER_SEL was already an LKGS invocation (decades before FRED)
    so under FRED needs to be just a MOV %gs.  Simply skip the SWAPGSes.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-10 11:57:31 +00:00
Andrew Cooper bbfb30f649 x86/traps: Enable FRED when requested
With the shadow stack and exception handling adjustements in place, we can now
activate FRED when appropriate.  Note that opt_fred is still disabled by
default until more development is complete.

Introduce init_fred() to set up all the MSRs relevant for FRED.  FRED uses
MSR_STAR (entries from Ring3 only), and MSR_FRED_SSP_SL0 aliases MSR_PL0_SSP
when CET-SS is active.  Otherwise, they're all new MSRs.

Also introduce init_fred_tss().  At this juncture we need a TSS set up, even
if it is mostly unused.  Reinsert the BUILD_BUG_ON() checking the size of the
TSS against 0x67, this time with a more precise comment.

With init_fred() existing, load_system_tables() and legacy_syscall_init()
should only be used when setting up IDT delivery.  Insert ASSERT()s to this
effect, and adjust the various init functions to make this property true.

The FRED initialisation path still needs to write to all system table
registers at least once, even if only to invalidate them.  Per the
documentation, percpu_early_traps_init() is responsible for switching off the
boot GDT, which also needs doing even in FRED mode.

Finally, set CR4.FRED in traps_init()/percpu_early_traps_init().

Xen can now boot in FRED mode and run a PVH dom0.  PV guests still need more
work before they can be run under FRED.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-03 15:15:54 +00:00
Andrew Cooper 0e9cc04453 x86/traps: Introduce FRED entrypoints
Under FRED, there's one entrypoint from Ring 3, and one from Ring 0.

FRED gives us a good stack (even for SYSCALL/SYSENTER), and a unified event
frame on the stack with all flags cleared, meaning that all software needs to
do is spill the GPRs with a line of PUSHes.  Introduce PUSH_AND_CLEAR_GPRS for
this purpose, along with the matching POP_GPRS.

Introduce entry_FRED_R0() which to a first approximation is complete for all
event handling within Xen.

entry_FRED_R0() needs deriving from entry_FRED_R3(), so introduce a basic
Ring3 handler.  There is more work required to make the return-to-guest path
work under FRED.

Also introduce entry_from_{xen,pv}() to be the C level handlers.  By simply
copying regs->fred_ss.vector into regs->entry_vector, we can reuse all the
existing fault handlers.

Extend fatal_trap() to render the event type including name, when FRED is
active.  This is slightly complicated, because X86_ET_OTHER must not use
vector_name() or SYSCALL and SYSENTER get rendered as #BP and #DB.

This is sufficient to handle all interrupts and exceptions encountered during
development, including plenty of Double Faults.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-03 15:15:54 +00:00
Andrew Cooper 7634f56625 x86/traps: Don't configure Supervisor Shadow Stack tokens in FRED mode
FRED doesn't use Supervisor Shadow Stack tokens.  This means that:

 1) memguard_guard_stack() should not write Supervisor Shadow Stack Tokens.
 2) cpu_has_bug_shstk_fracture is no longer relevant when deciding whether to
    enable Shadow Stacks or not.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-03 15:15:54 +00:00
Andrew Cooper 8e4775d118 x86/traps: Move traps_init() earlier on boot
We wish to make use of opt_fred earlier on boot, which involves moving
traps_init() earlier, but this comes with several ordering complications.

The feature word containing FRED needs collecting in early_cpu_init(), and
legacy_syscall_init() cannot be moved that early because it relies on the
stubs being allocated, yet must be called ahead of cpu_init() so the SYSCALL
linkage MSRs are set up before being cached.

Delaying legacy_syscall_init() is easy enough based on a system_state check.
Reuse bsp_traps_reinit() to cause a call to legacy_syscall_init() to occur at
the same point as previously.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-03 15:15:54 +00:00
Andrew Cooper c2f15b0fff x86/boot: Document the ordering dependency of _svm_cpu_up()
Lets just say this took an unreasonable amount of time and effort to track
down, when trying to move traps_init() earlier during boot.

When the SYSCALL linkage MSRs are not configured ahead of _svm_cpu_up() on the
BSP, context switch clobbers the later-set-up linkage with the 0's cached
here.  Amongst other problems, this causes PV guest to enter at 0 in
supervisor mode on the user stack.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-03 15:15:54 +00:00
Andrew Cooper a1e6afbf54 x86/boot: Move gdt_l1e caching out of traps_init()
Commit 564d261687 ("x86/ctxt-switch: Document and improve GDT handling") put
the initialisation of {,compat_}gdt_l1e into traps_init() but this wasn't a
great choice.  Instead, put it in smp_prepare_cpus() which performs the BSP
preparation of variables normally set up by cpu_smpboot_alloc() for APs.

This removes an implicit dependency that prevents traps_init() moving earlier
than move_xen() in the boot sequence.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-03 15:15:54 +00:00
Andrew Cooper 31cbb8e2a5 docs/guest-guide: Describe the PV traps and entrypoints ABI
... seeing as I've had to thoroughly reverse engineer it for FRED and make
tweaks in places.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-03-03 15:15:53 +00:00
Andrew Cooper a934a600c4 x86/pv: Don't assume that INT $imm8 instructions are two bytes long
For INT $N instructions (besides $0x80 for which there is a dedicated fast
path), handling is mostly fault-based because of DPL0 gates in the IDT.  This
means that when the guest kernel allows the instruction too, Xen must
increment %rip to the end of the instruction before passing a trap to the
guest kernel.

When an INT $N instruction has a prefix, it's longer than two bytes, and Xen
will deliver the "trap" with %rip pointing into the middle of the instruction.

Introduce a new pv_emulate_sw_interrupt() which uses x86_insn_length() to
determine the instruction length, rather than assuming two.

This is a change in behaviour for PV guests, but the prior behaviour cannot
reasonably be said to be intentional.

This change does not affect the INT $0x80 fastpath.  Prefixed INT $N
instructions occur almost exclusively in test code or exploits, and INT $0x80
appears to be the only user-usable interrupt gate in contemporary PV guests.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-03-03 15:15:53 +00:00
Andrew Cooper 878a9cfa45 x86/ucode: Support discrete modules being CPIO archives
Multiple downstream distros have tried passing discrete CPIO archives and
tripped over this not working.  It turns out to be easy to support, so do so.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Tested-by: Teddy Astie <teddy.astie@vates.tech>
2026-03-03 15:15:53 +00:00
Andrew Cooper 70c47ec5d6 xen: Adjust break/fallthrough statements
sh_destroy_shadow() has a spelling of fallthrough which doesn't match the
permitted pattern.  Convert it to a real fallthrough (psedo)keyword.

Elsewhere, insert breaks at the end of the default statements.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Michal Orzel <michal.orzel@amd.com>
2026-02-25 16:06:04 +00:00
Andrew Cooper 495d470d9f x86/shadow: Rework write_atomic() call in shadow_write_entries()
ECLAIR reports an unevaluated side effect in a sizeof() expression (R13.6
violation).

write_atomic() does take care to evaluates each parameter only once, but
expression is complicated to follow.  Rewrite it to less resemble an entry
from an obfuscation contest.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
2026-02-25 16:06:04 +00:00
Andrew Cooper 25bb2560ab arm/pci-designware: Fix MISRA violations
* Move includes inside the header guards (D4.10)
 * Use NULL in preference to 0 (R11.9)

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Michal Orzel <michal.orzel@amd.com>
2026-02-25 16:06:04 +00:00
Andrew Cooper 619d317cec xen/vmac: Const the key parameter of vmac_set_key()
ECLAIR reports that tboot_gen_domain_integrity() is casting away
constness (Rule 11.8 violation).

vmac_set_key() doesn't modify the user_key parameter, so it can become const,
removing the need to cast.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-02-25 16:06:04 +00:00
Andrew Cooper 44416a8431 xen: Include suitable headers to make declarations visible
A range of functions can't see their declarations, requiring the inclusion of
appropriate headers.

For pv/mm.h and pv/traps.h, this requires adjustments to become stand-alone.

In pv/mm.h, swap xen/lib.h for xen/bug.h now that ASSERT_UNREACHABLE() has
moved.  For pv/traps.h, pv_trap_callback_registered() needs to see a complete
struct vcpu, and xen/sched.h is not something appropriate to pull in
conditionally.

stack-protector.c can't see the declaration of __stack_chk_guard, and fixing
that reveals that stack-protector.h needs get_cycles() too.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-02-25 16:06:04 +00:00
Andrew Cooper 7df89867c6 xen/treewide: Adjust parameter names and types
MISRA Rule 8.2 says that parameters must all have names.  Rule 8.3 says that
the names and types must match between declaration and definition.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Michal Orzel <michal.orzel@amd.com>
2026-02-25 16:06:04 +00:00
Andrew Cooper 8d061c5b7a xen/treewide: Adjust suffixes on integer literals
Use U where necessary (Misra Rule 7.2) and uppercase L (Misra Rule 7.3).

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Michal Orzel <michal.orzel@amd.com>
2026-02-25 16:06:04 +00:00
Andrew Cooper afee8d04ad arm: Use __func__ in acpi_boot_table_init()
ECLAIR reports __FUNCTION__ as nonstandard syntax and a R1.1 violation.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Michal Orzel <michal.orzel@amd.com>
2026-02-25 16:06:04 +00:00
Andrew Cooper 7f15d5d132 xen/treewide: More typeof() -> auto conversions
All of these are simple cases of using typeof() to avoid multiple parameter
evaluation.  Using auto avoids multiple textural expansion also.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Bertrand Marquis <bertrand.marquis@arm.com>
2026-02-25 15:44:55 +00:00
Andrew Cooper 67bcf5eae7 xen/arm: Simplify type handling for SMCCC declarations
There's no use creating a typed copy of a macro argument, simply to use it to
create a second typed copy.  Remove the indirection, halving the number of
local variables created in scope.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Michal Orzel <michal.orzel@amd.com>
2026-02-25 13:06:56 +00:00
Andrew Cooper cd9cd05b2e xen/arm: Simplify SMCCC handling by reusing __declare_arg_$()
Now that the type handling is entirely uniform, it's easier to see that
__declare_arg_3() can use __declare_arg_2() and so on, just like the larger
__declare_arg_$()'s already do.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Michal Orzel <michal.orzel@amd.com>
2026-02-25 13:06:55 +00:00
Andrew Cooper 52e801093b CI: Extend eclair-*-allcode to enable as much as possible
On x86, this is basically everything.

For ARM, CONFIG_MPU and CONFIG_MMU are mutually exclusive (with
CONFIG_STATIC_MEMORY in the mix), as well as CONFIG_NEW_VGIC being mutually
exclusive with the other VGIC infrastructure.

No functional change, but a lot of new Eclair reports (non-blocking).

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Bertrand Marquis <bertrand.marquis@arm.com>
2026-02-18 16:12:43 +00:00
Andrew Cooper 3ff1030ea7 x86/fsgsbase: Make SHADOW_GS accesses safe under FRED
Under FRED, the SWAPGS instruction is disallowed.  Therefore we must use the
MSR path instead.

read_registers() is in the show_registers() path, so this change allows Xen to
render it's current state without suffering #UD (and recursing until the stack
guard page is hit).

All hardware with FRED is expected to have some kind of non-serialising access
to these registers.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-02-14 01:01:33 +00:00
Andrew Cooper 40fbf97177 x86/traps: Alter switch_stack_and_jump() for FRED mode
FRED and IDT differ by a Supervisor Token on the base of the shadow stack.
This means that switch_stack_and_jump() needs to discard one extra word when
FRED is active.

Fix a typo in the parameter name, which should be shstk_base.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
2026-02-14 01:01:33 +00:00
Andrew Cooper 9ad2c65726 xen/bitmap: Drop unused headers
Nothing in bitmap.h uses lib.h.  Reduce to just macros.h and string.h.  Drop
types.h while at it, as it comes in through bitops.h

cpumask.h and nodemask.h only include kernel.h to get container_of().  Move it
into macros.h where it belongs, cleaning it up as it goes.

acpi/numa.c was picking up printk() transitively through bitmap.h so include
lib.h directly.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Roger Pau Monné <roger.pau@citrix.com>
Acked-by: Julien Grall <jgrall@amazon.com>
2026-02-14 01:01:33 +00:00
Andrew Cooper 2cc63f3b8b xen: Strip vcpu_switch_to_aarch64_mode() from PPC and RISC-V stubs
This is absolutely too much copy&paste from ARM.  All other stubs look
somewhat reasonable.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
2026-02-14 01:01:33 +00:00
Andrew Cooper 4ae1962cdb x86/ucode: Rename the apply_microcode() hook to load()
The microcode suffix is redundant, and "microcode loading" is the more common
term.

Introduce the ucode_load() wrapper to encapsulate the alternative_call().

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jason Andryuk <jason.andryuk@amd.com>
2026-01-28 12:33:04 +00:00
Andrew Cooper ef31a8cefc x86/ucode: Rename the cpu_request_microcode() hook to parse()
cpu_request_microcode() was never a good name, and the microcode suffix is
redundant.  Rename it to simply parse().

Introduce ucode_parse() and ucode_parse_dup() wrappers around the parse()
hook, also abstracting away the make_copy parameter and associated
const-correctness.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jason Andryuk <jason.andryuk@amd.com>
2026-01-28 12:33:04 +00:00
Andrew Cooper fafa6c9f29 x86/ucode: Drop the parse_blob() wrapper
This frees up the name to be reused a little differently.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jason Andryuk <jason.andryuk@amd.com>
2026-01-28 12:33:04 +00:00
Andrew Cooper 18e255253a x86/amd: Exclude K8 RevD and earlier from levelling
Between RevD and RevE silicon, the feature MSRs moved location.  This property
is highlighted by the suggested workaround for Erratum #110 which gives the
two different MSRs for the extended feature leaf.

The other feature MSRs are not given and while they're easy enough to figure
out I don't have any K8's to test the result with.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-01-27 13:59:12 +00:00
Andrew Cooper f49bbd301b x86/amd: Fold another DE_CFG edit into amd_init_de_cfg()
As amd_init_de_cfg() states, it's only safe for there to be one location
writing to DE_CFG.  This happens to be a latent bug rather than a real one
because Fam12h CPUs aren't SMT-capable.  Nevertheless, group it together with
the other DE_CFG modifications.

This removes a printk() which is not noteworthy, and skips the adjustment
entirely under virt, where the attempted write wouldn't have stuck anyway.

Fixes: d0c75dc4c0 ("x86/amd: Fix race editing DE_CFG")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-01-27 13:59:12 +00:00
Andrew Cooper 3a814060bb x86/ucode: Adjust parse_ucode() to match other list handling
parse_ucode() is abnormal compared to similar parsing elsewhere in Xen.

Invert the ucode_mod_forced check with respect to the "scan" and integer
handling, so we can warn the user when we've elected to ignore the parameters,
and yield -EINVAL for any unrecognised list element.

Rewrite the ucode= command line docs for clarity.

No practical change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-01-27 13:59:12 +00:00
Andrew Cooper 6382bda1ea x86/svm: Adjust VMCB comments
The Intercept comments provide no value whatsoever.  For the VMCB, label the
Control area and State Save area, which are the names given by the APM.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-01-22 13:05:39 +00:00
Andrew Cooper 54deff5e13 x86/intel: Drop more cpuid_mask_* infrastructure
Despite removing references from the documentation, the Intel parts of CPUID
Masking were accidentally left behind and still active.

Intel CPUID Masking is even more niche than AMD masking, as the MSRs only
exist between Nehalem and SandyBridge, being fully replaced with CPUID
Faulting from IvyBridge onwards.

Fixes: 317051c2f0 ("x86/amd: Drop the cpuid_mask_* command line options")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-01-21 10:47:46 +00:00
Andrew Cooper 3e47cfe9ee x86/cpu-policy: Filter out OS{XSAVE,PKE} in calculate_raw_cpu_policy()
They're dynamic too, and don't have named fields because no (other) logic in
Xen ought to operate on them.  In particular, OSPKE being visible depending on
whether we're in HVM or PV vCPU context when scanning.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
2026-01-13 15:47:02 +00:00
Andrew Cooper 66228b6e40 xen/nodemask: Remove _unused_nodemask_arg_
This only exists to have it's type taken, despite there being a perfectly good
concrete type to use.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-01-13 15:47:02 +00:00
Andrew Cooper d2a91a1294 CI/randconfig: Disable CONFIG_CONDITION_COVERAGE
In addition to GCC not liking x86_emulate(), it turns out that Clang is still
rather more a work in progress than a usable feature, causing failures in the
FreeBSD builds:

  https://cirrus-ci.com/task/5934059060199424

Exclude CONFIG_CONDITION_COVERAGE from Ranconfig until it gets a bit more
stable.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Stefano Stabellini <sstabellini@kernel.org>
2026-01-13 15:47:02 +00:00
Andrew Cooper 6238c97ea4 xen: Use auto keyword as per C23
In macros it is common to declare local variables using typeof(param) in order
to ensure that side effects are only evaluated once.  A consequence of this is
double textural expansion of the parameter, which can get out of hand very
quickly with nested macros.

In C23, the auto keyword has been repurposed to perform type inference.

A GCC extension, __auto_type, is now available in the new toolchain baseline
and avoids the double textural expansion.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Frediano Ziglio <frediano.ziglio@cloud.com>
2026-01-09 20:20:57 +00:00
Andrew Cooper 69e8aaf9cc xen: Drop xenoprofile support
The most recent xenoprof change was 300ef0cb4f ("x86: Add Xenoprofile
support for AMD Family16h") in 2013, despite there being 42 changes worth of
other cleanup/rearranging since then.

Oprofile themselves dropped Xen support in commit 0c142c3a096d ("Remove
opcontrol and the GUI and processor models dependent on it") in 2014, as part
of releasing version 1.0 and switching over to using operf based on the Linux
perf_event subsystem.  Linux's version of this patch was merged in commit
24880bef417f ("Merge tag 'oprofile-removal-5.12'") in 2021.

Drop xenoprof and all supporting infrastructure, including the hypercall, the
XSM hook and flask vectors which lose their only caller, and even shrinks
struct domain by one pointer which wasn't properly excluded in
!CONFIG_XENOPROF builds.

Retain the public xenoprof.h header as it is ABI, but note that the
functionality is removed.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jason Andryuk <jason.andryuk@amd.com>
Reviewed-by: Teddy Astie <teddy.astie@vates.tech>
Acked-by: Oleksii Kurochko <oleksii.kurochko@gmail.com>
Acked-by: Daniel P. Smith <dpsmith@apertussolutions.com>
2026-01-09 19:05:45 +00:00
Andrew Cooper fe0ede8fe4 MISRA: Extend the R3.1 deviation for URLs to include git://
xen/drivers/passthrough/arm/ipmmu-vmsa.c contains a git:// URL in a block
comment.  This is also not an example of commented out code, so shouldn't be
considered a R3.1 violation.

Extend the regex to include git://, and swap hyperlink for URL in the
associated documentation to be more precise.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Michal Orzel <michal.orzel@amd.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
2026-01-09 14:24:24 +00:00
Andrew Cooper 913f40f4d1 xen/gen_hypercall: Leave a breadcrumb in xen-hypercall-defs.h
When Cscope-ing through Xen, one occasionally finds themselves in
xen-hypercall-defs.h and needing to find the originating file.

This is substantially magic, and even reading the Makefile that produces
xen-hypercall-defs.h is of little help if you're not aware of of the %.i : %.c
pattern rule, and that the header is generated from a .c file in practice.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Juergen Gross <jgross@suse.com>
2026-01-09 14:24:24 +00:00
Andrew Cooper d2be48728a x86: Correct comment about struct vcpu memflags restriction
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-01-09 14:24:24 +00:00
Andrew Cooper 65efa94cf5 xen: Move x86-ism out of muldiv64.c
Having an #ifdef CONFIG_X86 section in a common library is rude.

Furthermore, for x86 the main logic is 6 bytes, meaning it's ripe for
inlining.  Create an x86-specific asm/muldiv.h implementing arch_muldiv64().

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-01-07 11:53:01 +00:00
Andrew Cooper 7a459b8df7 xen: Split muldiv64() out of lib.h
muldiv64() has 7 users across all architectures, and is limited to time
handling functions.  Therefore, move it's declaration out of lib.h into a
dedicated header.

Rename the library function to generic_muldiv64(), as x86 is going to provide
an arch_muldiv64() in a subsequent change.

Explain what the function does, including the limitations; x86's version will
suffer a divide error rather than truncate the result to 64 bits.

Annotate it with attr_const, not that this allows the optimiser to improve any
of Xen's current users.  Add one selftest to check the internal precision,
putting it in bitops.c for want of any better place to put it.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Michal Orzel <michal.orzel@amd.com>
2026-01-07 11:53:01 +00:00
Andrew Cooper fe0e477e25 x86/time: Sort headers
... in preparation for a logical change.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2026-01-07 11:53:01 +00:00
Andrew Cooper 1ae6c79de1 arm/time: Sort headers
... in preparation for a logical change.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Michal Orzel <michal.orzel@amd.com>
2026-01-07 11:53:01 +00:00
Andrew Cooper b56a894e99 xen: Fix endian handling in muldiv64.c
WORDS_BIGENDIAN is a QEMU-ism.  In the very dim and distant past, we had a
fork of QEMU living in xen.git which wired WORDS_BIGENDIAN in the userspace
part of the build, but nothing ever wired it up in the hypervisor build.

Fixes: 86d5da49a6 ("[HVM] Support multiple HVM time device models coming soon.")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2026-01-07 11:53:01 +00:00
Andrew Cooper c36ddba28e x86: Address MIRSA R8.4 (declaration visibility) issues
set_guest_*_trapbounce() are only called from assembly so gain asmlinkage to
identify them.

xen_msr_s_cet_value() is called by assembly and C, so asmlinkage isn't
appropriate.  Make the declaration unconditional, which silences the
complaint.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-30 16:02:38 +00:00
Andrew Cooper 2c0d554387 x86: Address MISRA R8.3 (declaration/definition mismatch) issues
These are mostly name mismatches, but a couple have type alias mismatches too.

For shadow_put_top_level() and is_patch(), the declaration name is the better
choice so change the name in the function.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-30 16:02:38 +00:00
Andrew Cooper c9f9087725 x86/pv: Change type of do_update_descriptor()'s desc parameter
The automatically generated hypercall dispatch logic looks like:

    case __HYPERVISOR_update_descriptor: \
        ret = do_update_descriptor((uint64_t)(a1), (seg_desc_t)(a2)); \
        break; \

but seg_desc_t is a union and Eclair considers this to be a violation of MISRA
Rule 1.1.  There's also a Rule 8.3 violation for the parameter name mismatch.

Instead of playing games trying to change seg_desc_t to be a struct, or to
alter the AWK generator to know that seg_desc_t is magic and needs braces
rather than brackets, just switch the type to be a plain uint64_t.

The size is fixed by the x86 architecture, so it is never going to change.
This even lets us simplify compat_update_descriptor() a little.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-30 16:02:38 +00:00
Andrew Cooper 6069a752cd x86/pv: Address MISRA C:2012 Rule 4.1
MISRA doesn't like mixing hexadecimal escape sequences with ASCII text.  Use
the same workaround as in commit cd50483537 ("xen: address MISRA C:2012 Rule
4.1").

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-30 16:02:38 +00:00
Andrew Cooper f34c965281 tools/tests: Memory Claims
Add some basic testing of the memory claims mechainsm.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
2025-12-17 17:35:24 +00:00
Andrew Cooper 04ebc7b527 tools/tests: Sort Makefile
... and split the x86 group away from the common group.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
2025-12-17 17:35:24 +00:00
Andrew Cooper 7672602df6 tools/libxc: Delete ENOSYS squashing in xc_domain_claim_pages()
It's not acceptable to hide this from the caller; the effect of doing so is to
break an atomicity expectation.

Only the caller can know what the appropriate safety action is in the case
that the claim hypercall isn't available.  Ignoring it might be the right
thing to do, but xc_domain_claim_pages() cannot make this decision on behalf
of all callers.

Fixes: fc67e9dc0c ("xc: use XENMEM_claim_pages hypercall during guest creation.")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Roger Pau Monné <roger.pau@citrix.com>
2025-12-17 17:35:24 +00:00
Andrew Cooper 2379ca04fe xen/domain: Disallow XENMEM_claim_pages on dying domains
XENMEM_claim_pages can be issued on a domain in the later stages of
domain_kill().  In that case, the claimed memory is leaked, as there's no way
to subsequently release the claim.

Claims are intended for use during domain construction; to reserve sufficient
RAM to construct the domain fully.  There's no legitimate reason to be calling
it on a dying domain.

Fixes: 65c9792df6 ("mmu: Introduce XENMEM_claim_pages (subop of memory ops)")
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2025-12-17 17:35:24 +00:00
Andrew Cooper fb01f69edb x86/svm: Merge vmcb.h into svm-types.h
While doing so, make some style fixes to comments/etc.

This removes the include/asm/hvm/svm/ subdirectory.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-15 11:24:26 +00:00
Andrew Cooper ada965a47a x86/svm: Merge nestedsvm.h into svm-types.h
While doing so, move the ns_gif field to beside ns_hap_enabled to remove 7
padding bytes, and make some style fixes to comments/etc.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-15 11:24:26 +00:00
Andrew Cooper a336c18037 x86/svm: Introduce svm-types.h
In order to reduce the header tangle around xen/sched.h, we need to split
types away from other declarations.

Introduce a new hvm/svm-types.h to do this, including it from hvm/domain.h and
hvm/vcpu.h, and dropping all other inclusions of svm/vmcb.h and
svm/nestedhvm.h

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-15 11:24:26 +00:00
Andrew Cooper f1e2c3f377 x86/svm: Move svm_intercept_msr() into svm.h
The single user of svm_intercept_msr() outside of the main svm logic is in
vpmu_amd.c.  Currently the declaration is picked up transitively through
xen/sched.h, so include asm/hvm/svm.h explicitly.

Sort the headers while doing so.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-15 11:24:26 +00:00
Andrew Cooper f28c2f8f7b x86/svm: Move asm/hvm/svm/svm.h up one directory
... in preparation to remove the svm/ directory entirely.

intr.c doesn't need to include svm.h at all.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-15 11:24:26 +00:00
Andrew Cooper 4aa218acd4 xen/irq: Delete the pirq_cleanup_check() macro
MISRA Rule 5.5 objects to a macro aliasing a function, which is what
pirq_cleanup_check() does. The macro was originally intended to ensure the
condition 'if (!pirq->evtchn)' is always checked before invoking the function,
avoiding errors across call sites.

There are only a handful of users, so expand it inline to be plain regular
C. Doing this shows one path now needing braces, and one path in
'evtchn_bind_pirq()' where the expanded form simplifies back to no delta, as
it follows an unconditional clear of 'info->evtchn'.

While this complies with MISRA, it shifts the responsibility to developers to
check 'if (!pirq->evtchn)' at call sites.

No functional changes.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Dmytro Prokopchuk <dmytro_prokopchuk1@epam.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2025-12-12 03:04:48 +00:00
Andrew Cooper 3161cfa40b CI/eclair: Rename the eclair-* jobs for clarity
All Eclair scanning is for safety purposes, and the *-safety jobs are AMD's
configuration specifically, and other configurations will likely be different.
Rename them to *-amd.

Give the un-suffixed job an *-allcode suffix to make it clearer that they're
looking at all code.

Give the un-suffixed scheduled jobs an *-allrules suffix.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2025-12-12 03:04:48 +00:00
Andrew Cooper 0c40d08f7c x86: Fix missing brackets in macros
With the wider testing, some more violations have been spotted.  This
addresses violations of Rule 20.7 which requires macro parameters to be
bracketed.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2025-12-12 03:04:48 +00:00
Andrew Cooper f1b1860226 x86: Fix missing breaks
With the wider testing, some more violations have been spotted.  This
addresses violations of Rule 16.3 which requires all case statements to be
terminated with a break or other unconditional control flow change.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
2025-12-12 03:04:48 +00:00
Andrew Cooper 7becd32d84 x86/ucode: Don't cast away const-ness in cmp_patch_id()
Fixes a volation of MISRA rule 11.8.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
2025-12-12 03:04:48 +00:00
Andrew Cooper eb518632cd x86: Name parameters in function declarations
With the wider testing, some more violations have been spotted.  This
addresses violations of Rule 8.2 (parameters must be named).

livepatch_op() has a further problem.  The other declaration (the stub for
!LIVEPATCH builds) has a parameter named op, but the definition has the
parameter named livepatch.  Rename it to op which is more concise and better
in line with it's type name.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
2025-12-12 03:04:48 +00:00
Andrew Cooper b6f399b341 x86: Misra fixes for U/L suffixes
With the wider testing, some more violations have been spotted.  This
addresses violations of Rule 7.2 (suffixes required) and Rule 7.3 (L must be
uppercase).

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Nicola Vetrini <nicola.vetrini@bugseng.com>
2025-12-12 03:04:48 +00:00
Andrew Cooper cfa37c182c xen/libfdt: Fix comment following treewide __ASSEMBLY__ cleanup
This one comment didn't match the #ifdef symbol, and escaped conversion.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Michal Orzel <michal.orzel@amd.com>
2025-12-12 03:04:48 +00:00
Andrew Cooper 8efff5a69a tools/sd-notify.h: Include string.h too
Alpine Linux, when using --enable-systemd to get the init files, fails with:

  tools/include/xen-sd-notify.h:69:3: error: call to undeclared library
  function 'memcpy' with type 'void *(void *, const void *, unsigned long)';
  ISO C99 and later do not support implicit function declarations
  [-Wimplicit-function-declaration]
     69 |   memcpy(socket_addr.sun.sun_path, socket_path, path_length);
        |   ^

This will be down to using musl rather than glibc.  Include the appropriate
header.

Fixes: 78510f3a15 ("tools: Import stand-alone sd_notify() implementation from systemd")
Reported-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Marek Marczykowski-Górecki <marmarek@invisiblethingslab.com>
Acked-by: Anthony PERARD <anthony.perard@vates.tech>
2025-12-12 03:04:48 +00:00
Andrew Cooper 6ccebacb53 x86/svm: Drop svmdebug.h
svmdebug.h now only contains the declaration for svm_sync_vmcb(), despite the
logic being local to svm.c.  Move the declaration into the local svm.h

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Alejandro Vallejo <alejandro.garciavallejo@amd.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-12 03:04:48 +00:00
Andrew Cooper 0a55f32a2c x86/svm: Drop svmdebug.c
Everything here is really VMCB functionality, so merge it into vmcb.c.  Move
the declarations from the global svmdebug.h to the local vmcb.h.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-12 03:04:48 +00:00
Andrew Cooper f09b87a0ea x86/svm: Make vmcb_struct private to svm/
The rest of Xen has no buisness knowing this structure, and it is currently
included via xen/sched.h into most code.  Create a new private svm/vmcb.h.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Alejandro Vallejo <alejandro.garciavallejo@amd.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-12 03:04:48 +00:00
Andrew Cooper 0eff073ff8 x86/pv: Move hv_compat_vstart into pv_domain
The hv_compat_vstart variable is hidden behind CONFIG_PV32 but lives in
arch_domain.  Moving it into pv_domain is an obvious improvement.

Its value however is less obvious, and is a mess.

In !PV32 builds, it's uniformly treated as 0, but in PV32 builds it's ~0U (HVM
guests), __HYPERVISOR_COMPAT_VIRT_START (PV guests), or custom (PV32 dom0).
This seems to work because users are guarded behind is_pv32_{domain,vcpu}().

Simplify things by leaving it as 0 in PV32 builds for most domains,
initialising it in only in switch_compat() when a domain becomes 32bit PV.
dom0_construct() adjusts the value after calling switch_compat().

Suggested-by: Grygorii Strashko <grygorii_strashko@epam.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2025-12-10 14:48:45 +00:00
Andrew Cooper 156e27e497 x86/pv: Inline domain_set_alloc_bitsize() into it's single caller
Prior to commit 02e78311cd ("x86/domctl: Make XEN_DOMCTL_set_address_size
singleshot", Xen 4.9, 2016), it was possible for domains to switch to being
compat, and back again.  Since then however, becoming compat is a singleton
action that can't be undone.

From the context it's clear to see the is_pv_32bit_domain() check is
redundant, and from the singleton nature and being the only place setting
physaddr_bitsize, there's no need to check it for being 0.

No functional change.

Co-developed-by: Grygorii Strashko <grygorii_strashko@epam.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Grygorii Strashko <grygorii_strashko@epam.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-10 14:48:45 +00:00
Andrew Cooper 6633b7b8f1 x86/pv: Unhide writes to d->arch.hv_compat_vstart
The variable, when compiled in, is never 0, but because the writes into it are
hidden behind the HYPERVISOR_COMPAT_VIRT_START() macro, it has a very good
impression of being 0.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Grygorii Strashko <grygorii_strashko@epam.com>
2025-12-10 14:48:45 +00:00
Andrew Cooper 8b7a72f4d3 x86/kexec: Replace CALL+UD2 pattern with JMP
Linux jumps to the target image rather than calling it.  Switch to using JMP,
and drop the trailing UD2s.

Linux does have a mode, named CONFIG_KEXEC_JUMP, where the target image can be
returned from, but that involves extra metadata and setting up a stack within
the target image which Xen doesn't support at the moment.

No functional change.

Reported-by: Jan Beulich <jbeulich@suse.com>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2025-12-10 14:48:45 +00:00
Andrew Cooper 0ad41c6192 x86/entry: Rework the comment about SYSCALL and DF
It's soon going to be needed in a second location.

Right now it's misleading saying that nothing else would be cleared.  It's
missing the more important point that SYSCALLs are treated like all other
interrupts and exceptions, and undergo normal flags handling there.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-05 23:00:32 +00:00
Andrew Cooper 218e06e59a x86/entry: Drop the pre exception table infrastructure
It is no longer used.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-05 23:00:32 +00:00
Andrew Cooper 342e2e099d x86/entry: Alter how IRET faults are recognised
Right now we have two IRET instructions that can fault for guest reasons, and
the pre exception table gives handle_exception as the fixup for both.

Instead, we can have compat_restore_all_guest() use restore_all_guest()'s IRET
which gives us just a single position to handle specially.

In exception_with_ints_disabled(), remove search_pre_exception_table() and use
a simpler check.  Explain how the recovery works, because this isn't the first
time I've had to reverse engineer it for my own understanding.

The reference to iret_to_guest highlights that any checking here is specific
to CONFIG_PV, so exclude it in !PV builds.

Later in exception_with_ints_disabled(), it suffices to load %ecx rather than
%rcx, and remove a stray semi-colon from the REP MOVSQ.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2025-12-05 23:00:32 +00:00
Andrew Cooper 4153eb7660 x86/traps: Make an IDT-specific #PF helper
FRED provides %cr2 in the the stack frame, avoiding the need to read %cr2
manually.

Rename do_page_fault() to handle_PF(), and update it to take cr2, still named
addr for consistency.

Introduce a new handle_PF_IDT() which reads %cr2 and conditionally re-enables
interrupts.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2025-12-05 23:00:32 +00:00
Andrew Cooper d9974d7860 x86/traps: Make an IDT-specific #DB helper
FRED provides PENDING_DBG in the the stack frame, avoiding the need to read
%dr6 manually.

Rename do_debug() to handle_DB(), and update it to take a dbg field using
positive polarity.

Introduce a new handle_DB_IDT() which reads %dr6.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2025-12-05 23:00:32 +00:00
Andrew Cooper 524f3fa35e x86/pv: Deduplicate is_canonical_address() in do_set_segment_base()
This is really a rearrangement to make adding FRED support easier.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-05 23:00:32 +00:00
Andrew Cooper 3037d8b7eb x86/boot: Use RSTORSSP to establish SSP
Under FRED, SETSSBSY is disallowed, and we want to be setting up FRED prior to
setting up shadow stacks.  As we still need Supervisor Tokens in IDT mode, we
need mode-specific logic to establish SSP.

In FRED mode, write a Restore Token, RSTORSSP it, and discard the resulting
Previous-SSP token.

No change outside of FRED mode.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2025-12-05 23:00:32 +00:00
Andrew Cooper 42a0709f37 x86/fsgsbase: Improve code generation in read_registers()
It turns out that using the higher level helpers adjacent like this leads to
terrible code generation.  Due to -fno-strict-aliasing, the store into state
invalidates the read_cr4() address calculation (which is really cpu_info->cr4
under the hood), meaning that it can't be hoisted.

As a result we get "locate the top of stack block, get cr4, and see if
FSGSBASE is set" repeated 3 times, and an unreasonable number of basic blocks.

Hoist the calculation manually, which results in two basic blocks.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-05 23:00:32 +00:00
Andrew Cooper 6b448a92a3 x86/fsgsbase: Update fs/gs helpers to use wrmsrns()
... and rdmsr() while here.

Most of these accesses are in fastpaths and do not need serialising behaviour,
but the write side is serialising on all Intel hardware as well as older AMD
hardware.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2025-12-05 23:00:32 +00:00
Andrew Cooper 9900679fa9 x86/fsgsbase: Split out __{rd,wr}gs_shadow() helpers
Right now they're inline in {read,write}_gs_shadow(), but we're going to need
to use these elsewhere to support FRED.

No functional change.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2025-12-05 23:00:32 +00:00
Andrew Cooper 5bbe1fe413 ARM: Drop ThumbEE support
Hans reports that Xen no longer builds on Debian unstable/sid:

  Assembler messages:
  {standard input}:474: Error: unknown or missing system register name at operand 1 -- `msr TEECR32_EL1,x0'
  {standard input}:480: Error: unknown or missing system register name at operand 1 -- `msr TEEHBR32_EL1,x0'
  {standard input}:488: Error: unknown or missing system register name at operand 2 -- `mrs x0,TEECR32_EL1'
  {standard input}:494: Error: unknown or missing system register name at operand 2 -- `mrs x0,TEEHBR32_EL1'
  make[5]: *** [Rules.mk:249: arch/arm/domain.o] Error 1

This turns out to be an intentional change in binutils.  ThumbEE was dropped
ahead of ARM v8 (i.e. AArch64).

Xen supports ARM v7+virt extensions so in principle we could #ifdef
CONFIG_ARM_32 to keep it working.  However, there was apparently no use of
ThumbEE outside of demo code, so simply drop it.

On ThumbEE capable hardware, unconditionally trap ThumbEE instructions, and
drop the context switching logic for TEE{CR,HBR}32.

Reported-by: Hans van Kranenburg <hans@knorrie.org>
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Bertrand Marquis <bertrand.marquis@arm.com>
2025-12-05 18:06:19 +00:00