Commit Graph
28823 Commits
Author SHA1 Message Date
Daniel De Graaf f00b68e706 vtpm: add deep quote support
This allows the client of a vTPM to request a quote from the physical
TPM which includes PCRs from both the physical and virtual TPMs, signed
by an AIK from the physical TPM. This quote can be used to provide
evidence of the complete launch environment of a virtual machine.

Signed-off-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-23 11:58:09 +01:00
Daniel De Graaf d4ea6ab10f vtpm: add ordinal for obtaining an EK signature
For a vTPM to be useful for remote attestation, proof that the vTPM's EK
was generated and held within a secure vTPM implementation is necessary.
This patch adds an ordinal to the vTPM which will request a quote
providing this evidence from the TPM Manager; it only functions during
the first startup of a given vTPM in order to provide proof that the EK
was freshly generated (and not a key whose private part is available
elsewhere).

Signed-off-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-23 11:57:53 +01:00
Daniel De Graaf c1fe4dcf3f vtpm: passthru requests to manager
When sending commands to a vTPM, commands with the VTPM_TAG_REQ2 tag are
passed directly to the TPM Manager since they are used in the management
interface to the TPM Manager. The VTPM_TAG_REQ tag is translated to
TPM_TAG_RQU_COMMAND to allow access to the physical TPM for certain
ordinals (PCRRead, Extend, and GetRandom).

Signed-off-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-23 11:57:53 +01:00
Jason Andryuk 2c8a51eebe vtpmmgr: Convert TPM_Seal to use TPM_PCR_INFO_LONG
Infineon 1.2 TPMs fail TPM_Seal commands with TPM_BAD_PARAMETER when
PCRS are specified by a TPM_PCR_INFO structure.  Using a
TPM_PCR_INFO_LONG structure to specify PCRs succeeds, so update to use
that.  This also requires changes to use TPM_STORED_DATA12 for the
result.

Signed-off-by: Jason Andryuk <andryuk@aero.org>
Acked-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
2014-04-23 11:57:53 +01:00
Jason Andryuk d426026701 vtpmmgr: Store hardware TPM Locality
The TPM locality must be specified when using TPM_PCR_INFO_LONG for
TPM_Seal.  Store the locality so it can be provided later.

Signed-off-by: Jason Andryuk <andryuk@aero.org>
Acked-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
2014-04-23 11:57:53 +01:00
Daniel De Graaf ffa11862aa vtpmmgr: add example control tools
The manage-vtpmmgr.pl script is an example client for interacting with
the TPM Manager; it is intended to run in a management domain with a
vTPM (which may be dom0).  It is used to create and manage vTPMs and
vTPM groups.

The calc.pl script is an example manager of a vTPM group.  It signs
the configuration lists used by the TPM Manager with a locally held
private key.

Signed-off-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-23 11:57:42 +01:00
Daniel De Graaf 5c3705c900 vtpmmgr: add TPM group support
This is a complete rewrite of the disk format and key hierarchy for the
TPM Manager. The new format supports multiple groups of vTPMs which
define the permitted configurations where a given vTPM's keys are
available, allowing upgrades of critical components while retaining the
secrecy of cryptographic keys.

New features of the TPM Manager are explained in the README and in the
definitions of the management commands in vtpm_manager.h.

New features for vTPMs:

1. The size of the state blob for a vTPM is expanded from 52 to 64
bytes in order to support future vTPMs using SHA-2/3 instead of SHA-1.

2. vTPMs can obtain a quote from the physical TPM with certain
resettable PCRs set to include information about the vTPM. This can be
used by a vTPM to provide evidence of its integrity, including the
secrecy of its EK, and for deep quotes.

Some additional changes made by this rewrite that may impact existing
users:

1. The value of WELLKNOWN_OWNER_AUTH was incorrect for the physical TPM;
the convention is to use all zero bits for well-known authentication
values, not all one bits.

2. Randomly generating the owner auth value for the physical TPM is no
longer supported, as it prevents later creation or certification of
AIKs (which the old manager did not support).

3. The vTPM Manager needs to be provisioned with a PCR composite and an
upgrade authority's public key before it will save data across boots.

The current implementation still has some limitations:
 * 5 valid system PCR selections per group
 * The vTPM Manager's disk can use at most 2MB of space
 * The vTPM domain's build hash is always set to null/zero

Most of the code relating to upgrade and rollback protection is
currently stubbed out, but future versions can add:
 * Support for using the TPM's monotonic counter to prevent rollback
   of vTPM data by taking and restoring disk snapshots
 * Masking the master disk encryption key using a value stored in the
   TPM's NVRAM so that revocation of old data is possible without
   relying on all previously authorized software stacks to respect the
   monotonic counter's value

Signed-off-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-23 11:56:41 +01:00
Julien Grall 0b182202fe xen/arm: Don't let guess access to Debug and Performance Monitor registers
Debug and performance registers are not properly switched by Xen.

Trap them and inject an undefined instruction, except for those registers
which might be unconditionally accessed which we implement as RAZ/WI.

This is CVE-2014-2915 / XSA-93.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-23 10:31:07 +01:00
Julien Grall a0453db0c6 xen/arm: Don't expose implementation defined registers (Cp15 c15) to the guest
On Cortex-A15, CP15 c15 contains registers to retrieve data from L1/L2 RAM.

Exposing this registers to guest may result to leak data from Xen and/or
another guest.

By default trap every registers and inject an undefined instruction.

This is CVE-2014-2915 / XSA-93.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-23 10:31:07 +01:00
Julien Grall 11faafd9d9 xen/arm: Trap cache and TCM lockdown registers
Some cp15 c9/c10/c11 encodings are used for:
     - cache control
     - TCM control
     - branch predictor control

All of them are implementation defined. For now inject an undefined exception
if the guest wants try to access it.

This is CVE-2014-2915 / XSA-93.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-23 10:31:07 +01:00
Julien Grall cda12fa0ce xen/arm: Upgrade DCISW into DCCISW
A guest is allowed to use invalidate cache by set/way instruction (i.e DCISW)
without any restriction. As the cache is shared with Xen, the guest invalidate
an address being in used by Xen. This may lead a Xen crash because the memory
state is invalid.
Set the bit HCR.SWIO to upgrade invalidate cache by set/way instruction to an
invalidate and clean.

This is CVE-2014-2915 / XSA-93.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Reported-by: Thomas Leonard <tal36@cam.ac.uk>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-23 10:30:34 +01:00
Julien Grall 5496c64253 xen/arm: Don't let the guest access the coprocessors registers
In Xen we only handle save/restore for coprocessor 10 and 11 (NEON). Other
coprocessors (0-9, 12-13) are currently exposed to the guest and may lead
to data shared between guest.

Disable access to all coprocessor except 10 and 11 by setting correctly
HCTPR.

This is CVE-2014-2915 / XSA-93.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-23 10:30:34 +01:00
Julien Grall 60f737636c xen/arm: Inject an undefined instruction when the coproc/sysreg is not handled
Currently Xen panics if it's unable to handle a coprocessor/sysreg instruction.
Replace this behavior by inject an undefined instruction to the faulty guest
and log if Xen is in debug mode.

This is CVE-2014-2915 / XSA-93.

Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-23 10:30:33 +01:00
Wei Liu 8cfc8e5206 gitignore: ignore OVMF directories
Signed-off-by: Wei Liu <wei.liu2@citrix.com>
2014-04-22 14:15:15 +01:00
Andrew Cooper 75e253bb78 x86/EPT: correct double unmap_domain_page() on error path
c/s 3d90d6e6 "x86/EPT: split super pages upon mismatching memory types"
accidentally introduced an error path where the epte domain page would be
unmapped twice if splitting the superpage failed.

Only unmap the page if the loop is to be continued.  When breaking from the
loop, the page will be unmapped by the subsequent code.

Coverity-ID: 1203047
Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2014-04-22 14:45:10 +02:00
Daniel De Graaf 816f622482 allow hardware domain != dom0
This adds a hypervisor command line option "hardware_dom=" which takes a
domain ID.  When the domain with this ID is created, it will be used
as the hardware domain.

This is intended to be used when domain 0 is a dedicated stub domain for
domain building, allowing the hardware domain to be de-privileged and
act only as a driver domain.

Signed-off-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2014-04-22 12:10:13 +02:00
Andrew Cooper 4d21a95558 x86/hap: fix lack of newline in error message
to avoid corrupting the following line.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Jan Beulich <JBeulich@suse.com>
2014-04-22 12:09:36 +02:00
Boris Ostrovsky 88e64cb785 x86/HVM: use fixed TSC value when saving or restoring domain
When a domain is saved each VCPU's TSC value needs to be preserved. To get it we
use hvm_get_guest_tsc(). This routine (either itself or via get_s_time() which
it may call) calculates VCPU's TSC based on current host's TSC value (by doing a
rdtscll()). Since this is performed for each VCPU separately we end up with
un-synchronized TSCs.

Similarly, during a restore each VCPU is assigned its TSC based on host's current
tick, causing virtual TSCs to diverge further.

With this, we can easily get into situation where a guest may see time going
backwards.

Instead of reading new TSC value for each VCPU when saving/restoring it we should
use the same value across all VCPUs.

Reported-by: Philippe Coquard <philippe.coquard@mpsa.com>
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2014-04-22 12:08:56 +02:00
Boris Ostrovsky b95fd03b5f x86/svm: enable TSC scaling
TSC ratio enabling logic is inverted: we want to use it when we
are running in native tsc mode, i.e. when d->arch.vtsc is zero.

Also, since now svm_set_tsc_offset()'s calculations depend
on vtsc's value, we need to call hvm_funcs.set_tsc_offset() after
vtsc changes in tsc_set_info().

In addition, with TSC ratio enabled, svm_set_tsc_offset() will
need to do rdtsc. With that we may end up having TSCs on guest's
processors out of sync. d->arch.hvm_domain.sync_tsc which is set
by the boot processor can now be used by APs as reference TSC
value instead of host's current TSC.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2014-04-22 12:08:06 +02:00
Boris Ostrovsky 82713ec8d2 x86: use native RDTSC(P) execution when guest and host frequencies are the same
We should be able to continue using native RDTSC(P) execution on
HVM/PVH guests after migration if host and guest frequencies are
equal (this includes the case when the frequencies are made equal
by TSC scaling feature).

This also allows us to revert main part of commit 4aab59a3 (svm: Do not
intercept RDTSC(P) when TSC scaling is supported by hardware) which
was wrong: while RDTSC intercepts were disabled domain's vtsc could
still be set, leading to inconsistent view of guest's TSC.

Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
Acked-by: Jan Beulich <jbeulich@suse.com>
2014-04-22 12:07:37 +02:00
Jan Beulich e681c04085 ACPI/ERST: fix signed/unsigned type conflicts
Error checks exist in the respective code path that expect negative
values to indicate errors, yet negative values can't be communicated
through size_t. Thus ssize_t needs to be introduced (also on ARM for
consistency, even if the code in question isn't currently being used
on there).

The bug is theoretical only in so far as all the involved code is
effectively dead. Reflect this by excluding that code from non-debug
builds.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Christoph Egger <chegger@amazon.de>
2014-04-22 12:05:44 +02:00
Jan Beulich 061eebe0e9 x86/MSI: drop workaround for insecure Dom0 kernels
Considering that
- the workaround is expensive (iterating through the entire P2M space
  of a domain),
- the planned elimination of the expensiveness (by propagating the type
  change step by step to the individual P2M leaves) wouldn't address
  the IOMMU side of things (as for it to obey to the changed
  permissions the adjustments must be pushed down immediately through
  the entire tree)
- the proper solution (PHYSDEVOP_msix_prepare) should by now be
  implemented by all security conscious Dom0 kernels
remove the workaround, killing eventual guests that would be known to
become a security risk instead.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Kevin Tian <kevin.tian@intel.com>
2014-04-22 12:04:20 +02:00
Daniel De Graaf 01feb234d0 implement is_hardware_domain using hardware_domain global
This requires setting the hardware_domain variable earlier in
domain_create so that functions called from it (primarily in
arch_domain_create) observe the correct results when they call
is_hardware_domain.

Signed-off-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2014-04-17 10:10:33 +02:00
Mukesh Rathor b37bb2bfc2 pvh dom0: make xsm_map_gmfn_foreign available for x86
In this patch we make xsm_map_gmfn_foreign available for x86 also. This
is used in the next patch "pvh dom0: Add and remove foreign pages" in
function p2m_add_foreign.

Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com>
Acked-by: Daniel De Graaf <dgdegra@tycho.nsa.gov>
2014-04-17 10:07:44 +02:00
Mukesh Rathor 243cebb3df pvh dom0: introduce p2m_map_foreign
In this patch, a new type p2m_map_foreign is introduced for pages
that toolstack on an auto translated dom0 or a control domain maps
from foreign domains that its creating or supporting during its
run time.

Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com>
Acked-by: Tim Deegan <tim@xen.org>
2014-04-17 10:05:07 +02:00
Mukesh Rathor 6fdf4fa915 pvh dom0: move some pv specific code to static functions
In this preparatory patch, some pv specific code is
carved out into static functions. No functionality change.

Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
2014-04-17 10:03:41 +02:00
Ian Campbell 7100ee71b8 Merge branch 'staging' of ssh://xenbits.xen.org/home/xen/git/xen into staging 2014-04-16 17:28:23 +01:00
Jan Beulich 09c856316d x86: fix instruction emulator test's xgetbv constraints
The "A" constraint, while documented up to gcc 4.5 as "The a and d
registers, as a pair (for instructions that return half the result in
one and half in the other)," never really behaved that (natural) way,
but always meant (and is now also documented so) %eax _or_ %edx (%rax
_or_ %rdx on x86-64) unless the operand was wide enough to require both
(i.e. more than 32 bits on ix86 and more than 64 bits on x86-64).

Interestingly something internal to the compiler changed between 4.4
and 4.5 to actually expose the difference - up to gcc 4.4 I was unable
to construct a case where, when only the low half of the result is
actually looked at, the result would be considered to be in %edx/%rdx
(and %eax/%rax would be treated as unmodified by the instruction).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Keir Fraser <keir@xen.org>
Tested-by: Don Slutz <dslutz@verizon.com>
2014-04-16 18:18:35 +02:00
Suriyan Ramasami 94191dcee8 xen/arm: Pass the timer "clock-frequency" to DOM0 in make_timer_node()
If the DT representing the ARM generic timer mentions a clock-frequency,
propragate it to the DT that is built for DOM0.

This is necessary as a workaround for boards (Odroid-XU) where CNTFRQ is not
set or returns a wrong value.

Ideally CNTFRQ should be set by the boot loader. The bootloader should respect
the ARM ARM (see B.8.1.1):
    "The CNTFRQ register is UNKNOWN at reset, and therefore the counter
    frequency must written to CNTFRQ as part of the system boot process."

For the Odroid-XU the SPL BL2 code is entered in NS HYP mode which prevents
the execution of the mcr call to set CNTFRQ.

Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com>
Reviewed-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-16 17:10:57 +01:00
Andrew Cooper b1dfc531d8 tools/libxc: Remove valgrind conditional sections from libxc
The ifdef sections are not enabled at all in tree, and their justification is
out of date now that Xen hypercall support exists upstream in valgrind.

This also removes a commented-out tweak to CFLAGS in the libxc Makefile which
is not being used, and becomes stale given this patch.  In the unlikely event
that any developers were using the line, the results can be more easily
achieved by tweaking APPEND_CFLAGS in the environment.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
CC: Ian Jackson <Ian.Jackson@eu.citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-16 17:08:54 +01:00
Andrew Cooper 82774acf35 tools/libxl: Improvements to libxl-save-helper when using valgrind
Fix two unfree()'d allocations in libxl-save-helper, to get them out of the
way of other legitimate complaints from valgrind.

The first is easy; close the interface to libxc when done with it.

The second can be fixed by removing the complexity of creating the logging
instance.  Initialise the global 'logger' in place rather than as an
allocation, which requires changing the indirection of its use in 5 locations.

struct xentoollog_logger_tellparent and function createlogger_tellparent() are
now unused and removed.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-16 17:08:02 +01:00
Andrew Cooper dd7317a4a2 libxl/save-helper: Code motion of logging functions
... in preparation for a subsequent functional fix

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-16 17:07:52 +01:00
Wei Liu a842594822 libxl_types.idl: replace empty Struct with None for libxl_event
Now we generate empty map for None, the empty Struct trick is not
necessary anymore.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-16 17:06:49 +01:00
Wei Liu 5c77003b52 libxl/gentypes.py: generate empty map for None field in keyed-union
Without this the generated JSON is malformed.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-16 17:06:45 +01:00
Wei Liu b955e8c5b7 libxl_json: fix JSON parser debug code
Two changes included:
1. implement DEBUG_GEN_ALLOC for YAJL2
2. use size_t for variable "len"

without these two fixes it fails to compile when DEBUG_ANSWER is
defined.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-16 17:06:41 +01:00
Wei Liu 172c47d1c8 libxl/gentypes.py: don't generate JSON for private type(s)
Private types are only useful inside libxl. They don't have a valid JSON
generation function by default.

Currently there's only one private type, that's libxl_ev_link. Not
skipping this field causes testidl to fail as the code generated for
this type is NULL.

Signed-off-by: Wei Liu <wei.liu2@citrix.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-16 17:06:36 +01:00
Julien Grall 9b4e96724e xen/arm64: Correctly align VFP regs
On arm64, VFP instructions requires vfpregs to be 128-byte aligned.

By chance, the field is already correctly aligned. In the case if someone
decides to add a new field before, Xen will receive a data abort as soon as
it saves/restores VFP.

We are safe on arm32 as the only constraint is to be 32-byte aligned.

Reported-by: Chen Baozi <baozich@gmail.com>
Signed-off-by: Julien Grall <julien.grall@linaro.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
2014-04-16 17:00:47 +01:00
Ian Campbell 34f21f9d2b Revert "xen/arm: Allocate memory for dom0 from the bottom with the 1:1 Workaround"
This reverts commit 6c21cb36e2.

The Linux = issue which this works around was fixed in v3.13 via f52bb722547f
"ARM: mm: Correct virt_to_phys patching for 64 bit physical addresses".

This is the second attempt to revert this. Now that we have fixed
allocate_memory_11 to allocate accessible memory on 32-bit this is safe to do.
This is not quite a straight revert since we need to ensure that for 32-bit
domain 0 we do not allocate dom0's memory above 4GB where the domain cannot
access it without paging (which is disabled at start of day) and LPAE (which
the kernel may not support) enabled.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
[ ijc -- dropped debug code ]
2014-04-16 16:23:15 +01:00
Ian Campbell a8e15b7550 xen: arm: probe the kernel to determine the guest type earlier
We need to know if the kernel is 32- or 64- bit capable sooner so that we know
what sort of domain we are building when allocating memory to it (so we can
place appropriate limits when allocating RAM to the guest). At the moment
kernel_prepare() decides this but it needs the memory to have already been
allocated.

Therefore split the probing functionality of kernel_prepare() and call it much
earlier. The remainder of kernel_prepare() deals with where to place the
kernel in RAM which can be deferred until kernel_load() so do so.

Document the input and output of kernel_probe() and _load().

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
[ ijc -- whitespace fixes ]
2014-04-16 16:21:19 +01:00
Ian Campbell 315b7a0c8f xen: arm: refactor struct kernel_info
The kernel_order and kernel_image fields are ELF specific.

Also add a few comments about what things are.

Signed-off-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Julien Grall <julien.grall@linaro.org>
2014-04-16 16:20:16 +01:00
Jan Beulich c82fbfe6ec x86/HAP: also flush TLB when altering a present 1G or intermediate entry
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Tim Deegan <tim@xen.org>
2014-04-14 15:14:47 +02:00
Jan Beulich f73e225ac5 MAINTAINERS: extend coverage for "THE REST"
As agreed upon in offlist discussion among the committers, make all
committers eligible to approve changes to code not having its
maintainership covered explicitly. (For committers to make changes to
such code, generally an ack from a second committer is going to be
required.)

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Keir Fraser <keir@xen.org>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
2014-04-14 15:13:33 +02:00
Jan Beulich 1ca73aaf51 x86/nested HAP: don't BUG() on legitimate error
p2m_set_entry() can fail without there being a bug in the code - crash
the domain rather than the host in that case.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Acked-by: Tim Deegan <tim@xen.org>
2014-04-14 12:50:56 +02:00
Mukesh Rathor 561e1dc85e x86/p2m: error code propagation
Because some of the leaf p2m functions return 0 for failure and
TRUE for success, the real errno is lost. We change some of those
functions to return proper -errno. Also, any code in the immediate
vicinity that is in coding style violation is fixed up.

This patch doesn't change any functionality.

Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Tim Deegan <tim@xen.org>
2014-04-14 12:47:29 +02:00
Mukesh Rathor 11f7c1ff85 Rename "set_p2m_entry" to "p2m_set_entry"
This patch renames set_p2m_entry defined in arch/x86/mm/p2m.c
to p2m_set_entry which makes it consistent with other functions
from that file. It also facilitates changing the function signature
to return approriate errno for failure cases.  This patch doesn't
change any functionality.

Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com>
Acked-by: Tim Deegan <tim@xen.org>
2014-04-14 12:44:39 +02:00
Mukesh Rathor 50465f3766 x86: rename public functions in p2m-pt.c
This patch renames "public" functions in p2m-pt.c. In addition to
making them more descriptive, it also frees up "p2m_set_entry" name
to be used later.  This patch doesn't change any functionality.

Signed-off-by: Mukesh Rathor <mukesh.rathor@oracle.com>
Acked-by: Tim Deegan <tim@xen.org>
2014-04-14 12:43:36 +02:00
Aravindh Puthiyaparambil b144a816e6 x86: fix up mem_access.h
Fix filename in the description
Add double inclusion guard

Signed-off-by: Aravindh Puthiyaparambil <aravindp@cisco.com>
Acked-by: Tim Deegan <tim@xen.org>
2014-04-14 12:42:26 +02:00
Fabio Fantoni 074535021b tools: improve make debball
- Remove version from installed package name, to make "upgrades" work
- Add conffiles to manage files in /etc on package install/update/remove
- Added in description that this is a .deb for testing only

Signed-off-by: Fabio Fantoni <fabio.fantoni@m2r.biz>
Acked-by: George Dunlap <george.dunlap@eu.citrix.com>
Signed-off-by: Ian Jackson <ian.jackson@eu.citrix.com>
Acked-by: Ian Jackson <ian.jackson@eu.citrix.com>
2014-04-11 15:46:30 +01:00
Jan Beulich 29ded52bd4 further prefetch cleanup
- commit 630017f4 ("xen: x86 & generic: change to __builtin_prefetch()")
  removed the ARCH_HAS_PREFETCH{,W} defines, but left the
  ARCH_HAS_SPINLOCK_PREFETCH one in place
- the x86 special casing code has always been dead due to the two
  respective CONFIG_* settings not getting defined anywhere

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Ian Campbell <ian.campbell@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
2014-04-11 11:27:04 +02:00
Jan Beulich 8f7f6ab879 evtchn: eliminate 64k ports limitation
The introduction of FIFO event channels claimed to support over 100k
ports, but failed to widen a number of 16-bit variables/operations.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: David Vrabel <david.vrabel@citrix.com>
Acked-by: Keir Fraser <keir@xen.org>
2014-04-11 11:25:56 +02:00