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xen/tools
Alejandro Vallejo 8347d6bb29 x86: Add bit definitions for Automatic IBRS
This is an AMD feature to reduce the IBRS handling overhead. Once enabled,
processes running at CPL=0 are automatically IBRS-protected even if
SPEC_CTRL.IBRS is not set. Furthermore, the RAS/RSB is cleared on VMEXIT.

The feature is exposed in CPUID and toggled in EFER.

Signed-off-by: Alejandro Vallejo <alejandro.vallejo@cloud.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
2023-05-30 18:24:07 +01:00
..
2022-07-11 12:13:24 +02:00
2023-05-16 20:03:02 +01:00
2023-03-17 10:44:16 +00:00
2023-03-23 09:18:26 +01:00
2023-05-16 20:03:02 +01:00
2023-03-17 10:44:16 +00:00