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This is an AMD feature to reduce the IBRS handling overhead. Once enabled, processes running at CPL=0 are automatically IBRS-protected even if SPEC_CTRL.IBRS is not set. Furthermore, the RAS/RSB is cleared on VMEXIT. The feature is exposed in CPUID and toggled in EFER. Signed-off-by: Alejandro Vallejo <alejandro.vallejo@cloud.com> Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>