xen/sysctl: Drop XEN_SYSCTL_get_cpu_levelling_caps

This hypercall is an addition of mine from commit 67528a3f06 ("x86/cpu:
Sysctl and common infrastructure for levelling context switching", 2016), but
it never got wired into any toolstacks.  In the meantime, how we handle CPUID
for guests has evolved substantially.

In order to reuse the AMD levelling infrasturcture for boot time quirks,
levelling_caps is going to have to change.  While it's probably safe to expose
this difference, it's safer still to make it an internal detail.

When re-plummbing the LCAP_* constants, turn them all into single bits.

Signed-off-by: Andrew Cooper <andrew.cooper3@citrix.com>
Reviewed-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Daniel P. Smith <dpsmith@apertussolutions.com>
This commit is contained in:
Andrew Cooper committed 2026-04-04 12:20:11 +02:00
1 parent 670ef9e719
commit 370c23d032
9 files changed
+10 -59

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+2
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@@ -26,6 +26,8 @@ The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.0.0/)
- The cpuid_mask_* command line options for legacy CPUs. These were
deprecated in Xen 4.7 and noted not to work correctly with AMD CPUs from
2011 onwards, nor work at all with Intel CPUs from 2012.
- The SYSCTL_get_cpu_levelling_caps sysctl. This is not known to have been
used by any toolstack.
- Xenoprofile support. Oprofile themselves removed support for Xen in 2014
prior to the version 1.0 release, and there has been no development since
before then in Xen.
-1
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@@ -43,7 +43,6 @@ allow dom0_t xen_t:xen2 {
psr_alloc
pmu_ctrl
get_symbol
get_cpu_levelling_caps
get_cpu_featureset
livepatch_op
coverage_op
-1
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@@ -822,7 +822,6 @@ int xc_cpu_policy_update_msrs(xc_interface *xch, xc_cpu_policy_t *policy,
bool xc_cpu_policy_is_compatible(xc_interface *xch, xc_cpu_policy_t *host,
xc_cpu_policy_t *guest);
int xc_get_cpu_levelling_caps(xc_interface *xch, uint32_t *caps);
int xc_get_cpu_featureset(xc_interface *xch, uint32_t index,
uint32_t *nr_features, uint32_t *featureset);
-14
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@@ -36,20 +36,6 @@ enum {
#define bitmaskof(idx) (1u << ((idx) & 31))
#define featureword_of(idx) ((idx) >> 5)
int xc_get_cpu_levelling_caps(xc_interface *xch, uint32_t *caps)
{
struct xen_sysctl sysctl = {};
int ret;
sysctl.cmd = XEN_SYSCTL_get_cpu_levelling_caps;
ret = do_sysctl(xch, &sysctl);
if ( !ret )
*caps = sysctl.u.cpu_levelling_caps.caps;
return ret;
}
int xc_get_cpu_featureset(xc_interface *xch, uint32_t index,
uint32_t *nr_features, uint32_t *featureset)
{
+6 -9
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@@ -15,15 +15,12 @@ extern const uint32_t known_features[FSCAPINTS];
* Expected levelling capabilities (given cpuid vendor/family information),
* and levelling capabilities actually available (given MSR probing).
*/
#define LCAP_faulting XEN_SYSCTL_CPU_LEVELCAP_faulting
#define LCAP_1cd (XEN_SYSCTL_CPU_LEVELCAP_ecx | \
XEN_SYSCTL_CPU_LEVELCAP_edx)
#define LCAP_e1cd (XEN_SYSCTL_CPU_LEVELCAP_extd_ecx | \
XEN_SYSCTL_CPU_LEVELCAP_extd_edx)
#define LCAP_Da1 XEN_SYSCTL_CPU_LEVELCAP_xsave_eax
#define LCAP_6c XEN_SYSCTL_CPU_LEVELCAP_thermal_ecx
#define LCAP_7ab0 (XEN_SYSCTL_CPU_LEVELCAP_l7s0_eax | \
XEN_SYSCTL_CPU_LEVELCAP_l7s0_ebx)
#define LCAP_faulting (1U << 0) /* CPUID Faulting */
#define LCAP_1cd (1U << 1) /* 0x00000001.ecx/edx */
#define LCAP_e1cd (1U << 2) /* 0x80000001.ecx/edx */
#define LCAP_Da1 (1U << 3) /* 0x0000000D:1.eax */
#define LCAP_6c (1U << 4) /* 0x00000006.ecx */
#define LCAP_7ab0 (1U << 5) /* 0x00000007:0.eax/ebx */
extern unsigned int expected_levelling_cap, levelling_caps;
struct cpuidmasks
-6
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@@ -289,12 +289,6 @@ long arch_do_sysctl(
break;
}
case XEN_SYSCTL_get_cpu_levelling_caps:
sysctl->u.cpu_levelling_caps.caps = levelling_caps;
if ( __copy_field_to_guest(u_sysctl, sysctl, u.cpu_levelling_caps.caps) )
ret = -EFAULT;
break;
case XEN_SYSCTL_get_cpu_featureset:
{
static const struct cpu_policy *const policy_table[6] = {
+2 -22
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@@ -932,25 +932,6 @@ struct xen_sysctl_psr_alloc {
} u;
};
/*
* XEN_SYSCTL_get_cpu_levelling_caps (x86 specific)
*
* Return hardware capabilities concerning masking or faulting of the cpuid
* instruction for PV guests.
*/
struct xen_sysctl_cpu_levelling_caps {
#define XEN_SYSCTL_CPU_LEVELCAP_faulting (1UL << 0) /* CPUID faulting */
#define XEN_SYSCTL_CPU_LEVELCAP_ecx (1UL << 1) /* 0x00000001.ecx */
#define XEN_SYSCTL_CPU_LEVELCAP_edx (1UL << 2) /* 0x00000001.edx */
#define XEN_SYSCTL_CPU_LEVELCAP_extd_ecx (1UL << 3) /* 0x80000001.ecx */
#define XEN_SYSCTL_CPU_LEVELCAP_extd_edx (1UL << 4) /* 0x80000001.edx */
#define XEN_SYSCTL_CPU_LEVELCAP_xsave_eax (1UL << 5) /* 0x0000000D:1.eax */
#define XEN_SYSCTL_CPU_LEVELCAP_thermal_ecx (1UL << 6) /* 0x00000006.ecx */
#define XEN_SYSCTL_CPU_LEVELCAP_l7s0_eax (1UL << 7) /* 0x00000007:0.eax */
#define XEN_SYSCTL_CPU_LEVELCAP_l7s0_ebx (1UL << 8) /* 0x00000007:0.ebx */
uint32_t caps;
};
/*
* XEN_SYSCTL_get_cpu_featureset (x86 specific)
*
@@ -1269,8 +1250,8 @@ struct xen_sysctl {
#define XEN_SYSCTL_psr_cmt_op 21
#define XEN_SYSCTL_pcitopoinfo 22
#define XEN_SYSCTL_psr_alloc 23
/* #define XEN_SYSCTL_tmem_op 24 */
#define XEN_SYSCTL_get_cpu_levelling_caps 25
/* #define XEN_SYSCTL_tmem_op 24 */
/* #define XEN_SYSCTL_get_cpu_levelling_caps 25 */
#define XEN_SYSCTL_get_cpu_featureset 26
#define XEN_SYSCTL_livepatch_op 27
/* #define XEN_SYSCTL_set_parameter 28 */
@@ -1300,7 +1281,6 @@ struct xen_sysctl {
struct xen_sysctl_coverage_op coverage_op;
struct xen_sysctl_psr_cmt_op psr_cmt_op;
struct xen_sysctl_psr_alloc psr_alloc;
struct xen_sysctl_cpu_levelling_caps cpu_levelling_caps;
struct xen_sysctl_cpu_featureset cpu_featureset;
struct xen_sysctl_livepatch_op livepatch;
#if defined(__i386__) || defined(__x86_64__)
-4
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@@ -884,10 +884,6 @@ static int cf_check flask_sysctl(int cmd)
return avc_current_has_perm(SECINITSID_XEN, SECCLASS_XEN2,
XEN2__PSR_ALLOC, NULL);
case XEN_SYSCTL_get_cpu_levelling_caps:
return avc_current_has_perm(SECINITSID_XEN, SECCLASS_XEN2,
XEN2__GET_CPU_LEVELLING_CAPS, NULL);
case XEN_SYSCTL_get_cpu_featureset:
return avc_current_has_perm(SECINITSID_XEN, SECCLASS_XEN2,
XEN2__GET_CPU_FEATURESET, NULL);
-2
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@@ -87,8 +87,6 @@ class xen2
pmu_ctrl
# PMU use (domains, including unprivileged ones, will be using this operation)
pmu_use
# XEN_SYSCTL_get_cpu_levelling_caps
get_cpu_levelling_caps
# XEN_SYSCTL_get_cpu_featureset
get_cpu_featureset
# XEN_SYSCTL_livepatch_op
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