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x86/monitor: add masking support for write_ctrlreg events
Add support for filtering out the write_ctrlreg monitor events if they are generated only by changing certains bits. A new parameter (bitmask) was added to the xc_monitor_write_ctrlreg function in order to mask the event generation if the changed bits are set. Signed-off-by: Petre Pircalabu <ppircalabu@bitdefender.com> Acked-by: Tamas K Lengyel <tamas@tklengyel.com> Acked-by: Wei Liu <wei.liu2@citrix.com>
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4c09689153
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6 files changed
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@@ -1999,7 +1999,7 @@ int xc_monitor_get_capabilities(xc_interface *xch, domid_t domain_id,
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uint32_t *capabilities);
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int xc_monitor_write_ctrlreg(xc_interface *xch, domid_t domain_id,
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uint16_t index, bool enable, bool sync,
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bool onchangeonly);
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uint64_t bitmask, bool onchangeonly);
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/*
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* A list of MSR indices can usually be found in /usr/include/asm/msr-index.h.
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* Please consult the Intel/AMD manuals for more information on
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@@ -70,7 +70,7 @@ int xc_monitor_get_capabilities(xc_interface *xch, domid_t domain_id,
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int xc_monitor_write_ctrlreg(xc_interface *xch, domid_t domain_id,
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uint16_t index, bool enable, bool sync,
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bool onchangeonly)
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uint64_t bitmask, bool onchangeonly)
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{
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DECLARE_DOMCTL;
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@@ -82,6 +82,9 @@ int xc_monitor_write_ctrlreg(xc_interface *xch, domid_t domain_id,
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domctl.u.monitor_op.u.mov_to_cr.index = index;
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domctl.u.monitor_op.u.mov_to_cr.sync = sync;
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domctl.u.monitor_op.u.mov_to_cr.onchangeonly = onchangeonly;
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domctl.u.monitor_op.u.mov_to_cr.bitmask = bitmask;
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domctl.u.monitor_op.u.mov_to_cr.pad1 = 0;
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domctl.u.monitor_op.u.mov_to_cr.pad2 = 0;
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return do_domctl(xch, &domctl);
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}
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@@ -38,7 +38,8 @@ bool_t hvm_monitor_cr(unsigned int index, unsigned long value, unsigned long old
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if ( (ad->monitor.write_ctrlreg_enabled & ctrlreg_bitmask) &&
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(!(ad->monitor.write_ctrlreg_onchangeonly & ctrlreg_bitmask) ||
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value != old) )
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value != old) &&
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(!((value ^ old) & ad->monitor.write_ctrlreg_mask[index])) )
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{
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bool_t sync = !!(ad->monitor.write_ctrlreg_sync & ctrlreg_bitmask);
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@@ -136,6 +136,9 @@ int arch_monitor_domctl_event(struct domain *d,
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if ( unlikely(mop->u.mov_to_cr.index > 31) )
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return -EINVAL;
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if ( unlikely(mop->u.mov_to_cr.pad1 || mop->u.mov_to_cr.pad2) )
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return -EINVAL;
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ctrlreg_bitmask = monitor_ctrlreg_bitmask(mop->u.mov_to_cr.index);
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old_status = !!(ad->monitor.write_ctrlreg_enabled & ctrlreg_bitmask);
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@@ -155,9 +158,15 @@ int arch_monitor_domctl_event(struct domain *d,
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ad->monitor.write_ctrlreg_onchangeonly &= ~ctrlreg_bitmask;
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if ( requested_status )
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{
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ad->monitor.write_ctrlreg_mask[mop->u.mov_to_cr.index] = mop->u.mov_to_cr.bitmask;
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ad->monitor.write_ctrlreg_enabled |= ctrlreg_bitmask;
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}
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else
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{
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ad->monitor.write_ctrlreg_mask[mop->u.mov_to_cr.index] = 0;
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ad->monitor.write_ctrlreg_enabled &= ~ctrlreg_bitmask;
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}
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if ( VM_EVENT_X86_CR3 == mop->u.mov_to_cr.index )
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{
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@@ -406,6 +406,7 @@ struct arch_domain
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unsigned int cpuid_enabled : 1;
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unsigned int descriptor_access_enabled : 1;
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struct monitor_msr_bitmap *msr_bitmap;
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uint64_t write_ctrlreg_mask[4];
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} monitor;
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/* Mem_access emulation control */
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@@ -1107,6 +1107,14 @@ struct xen_domctl_monitor_op {
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uint8_t sync;
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/* Send event only on a change of value */
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uint8_t onchangeonly;
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/* Allignment padding */
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uint8_t pad1;
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uint32_t pad2;
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/*
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* Send event only if the changed bit in the control register
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* is not masked.
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*/
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uint64_aligned_t bitmask;
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} mov_to_cr;
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struct {
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