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x86/IO-APIC: drop setup_ioapic_ids_from_mpc()
Along the lines of what b89f8f054f ("x86/apic: Drop sync_Arb_IDs()")
said, the function is dead logic as well: All 64-bit capable Intel systems
have (at least) xAPIC (if not x2APIC).
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Jason Andryuk <jason.andryuk@amd.com>
Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
Release-Acked-by: Oleksii Kurochko<oleksii.kurochko@gmail.com>
This commit is contained in:
1 parent
aad6ebf059
commit
85face4375
1 file changed
-119
@@ -1458,119 +1458,6 @@ void disable_IO_APIC(void)
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disconnect_bsp_APIC(ioapic_i8259.pin != -1);
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}
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/*
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* function to set the IO-APIC physical IDs based on the
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* values stored in the MPC table.
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*
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* by Matt Domsch <Matt_Domsch@dell.com> Tue Dec 21 12:25:05 CST 1999
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*/
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static void __init setup_ioapic_ids_from_mpc(void)
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{
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union IO_APIC_reg_00 reg_00;
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static physid_mask_t __initdata phys_id_present_map;
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int apic;
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int i;
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unsigned char old_id;
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unsigned long flags;
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const uint32_t broadcast_id = 0xf;
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/*
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* Don't check I/O APIC IDs for xAPIC systems. They have
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* no meaning without the serial APIC bus.
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*/
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if (!(boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
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|| APIC_XAPIC(apic_version[boot_cpu_physical_apicid]))
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return;
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/*
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* This is broken; anything with a real cpu count has to
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* circumvent this idiocy regardless.
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*/
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phys_id_present_map = phys_cpu_present_map;
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/*
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* Set the IOAPIC ID to the value stored in the MPC table.
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*/
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for (apic = 0; apic < nr_ioapics; apic++) {
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if (!nr_ioapic_entries[apic])
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continue;
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/* Read the register 0 value */
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spin_lock_irqsave(&ioapic_lock, flags);
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reg_00.raw = io_apic_read(apic, 0);
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spin_unlock_irqrestore(&ioapic_lock, flags);
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old_id = mp_ioapics[apic].mpc_apicid;
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if (mp_ioapics[apic].mpc_apicid >= broadcast_id) {
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printk(KERN_ERR "BIOS bug, IO-APIC#%d ID is %d in the MPC table!...\n",
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apic, mp_ioapics[apic].mpc_apicid);
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printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
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reg_00.bits.ID);
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mp_ioapics[apic].mpc_apicid = reg_00.bits.ID;
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}
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/*
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* Sanity check, is the ID really free? Every APIC in a
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* system must have a unique ID or we get lots of nice
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* 'stuck on smp_invalidate_needed IPI wait' messages.
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*/
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if ( physid_isset(mp_ioapics[apic].mpc_apicid, phys_id_present_map) )
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{
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printk(KERN_ERR "BIOS bug, IO-APIC#%d ID %d is already used!...\n",
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apic, mp_ioapics[apic].mpc_apicid);
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for (i = 0; i < broadcast_id; i++)
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if (!physid_isset(i, phys_id_present_map))
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break;
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if (i >= broadcast_id)
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panic("Max APIC ID exceeded\n");
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printk(KERN_ERR "... fixing up to %d. (tell your hw vendor)\n",
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i);
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mp_ioapics[apic].mpc_apicid = i;
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} else {
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apic_printk(APIC_VERBOSE, "Setting %d in the "
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"phys_id_present_map\n",
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mp_ioapics[apic].mpc_apicid);
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}
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physid_set(mp_ioapics[apic].mpc_apicid, phys_id_present_map);
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/*
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* We need to adjust the IRQ routing table
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* if the ID changed.
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*/
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if (old_id != mp_ioapics[apic].mpc_apicid)
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for (i = 0; i < mp_irq_entries; i++)
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if (mp_irqs[i].mpc_dstapic == old_id)
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mp_irqs[i].mpc_dstapic
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= mp_ioapics[apic].mpc_apicid;
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/*
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* Read the right value from the MPC table and
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* write it into the ID register.
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*/
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apic_printk(APIC_VERBOSE, KERN_INFO
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"...changing IO-APIC physical APIC ID to %d ...",
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mp_ioapics[apic].mpc_apicid);
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reg_00.bits.ID = mp_ioapics[apic].mpc_apicid;
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spin_lock_irqsave(&ioapic_lock, flags);
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io_apic_write(apic, 0, reg_00.raw);
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spin_unlock_irqrestore(&ioapic_lock, flags);
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/*
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* Sanity check
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*/
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spin_lock_irqsave(&ioapic_lock, flags);
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reg_00.raw = io_apic_read(apic, 0);
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spin_unlock_irqrestore(&ioapic_lock, flags);
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if (reg_00.bits.ID != mp_ioapics[apic].mpc_apicid)
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printk("could not set ID!\n");
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else
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apic_printk(APIC_VERBOSE, " ok.\n");
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}
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}
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/*
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* There is a nasty bug in some older SMP boards, their mptable lies
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* about the timer IRQ. We do the following to work around the situation:
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@@ -2158,12 +2045,6 @@ void __init setup_IO_APIC(void)
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ioapic_level_type.end = end_level_ioapic_irq_new;
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}
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/*
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* Set up IO-APIC IRQ routing.
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*/
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if (!acpi_ioapic)
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setup_ioapic_ids_from_mpc();
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setup_IO_APIC_irqs();
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init_IO_APIC_traps();
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check_timer();
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